Patrik Jakobsson 53a7d2d15e drm/i915: Set i9xx lvds clock limits according to specifications ...

The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and 5-9.
Since we do all calculations based on them being register values (which are
subtracted by 2) we need to specify them accordingly.

Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2013-02-20 00:21:46 +01:00

..

drm

drm/i915: Set i9xx lvds clock limits according to specifications

2013-02-20 00:21:46 +01:00

stub

i915: select VIDEO_OUTPUT_CONTROL for ACPI_VIDEO

2011-04-13 09:10:25 +10:00

vga

fbcon: fix locking harder

2013-02-08 12:02:43 +10:00

Makefile

gpu: Add Intel GMA500(Poulsbo) Stub Driver

2010-10-26 11:00:13 +10:00