Files
android_kernel_xiaomi_sm8450/drivers/spi
Brian Norris 5185a81c02 spi: rockchip: limit transfers to (64K - 1) bytes
The Rockchip SPI controller's length register only supports 16-bits,
yielding a maximum length of 64KiB (the CTRLR1 register holds "length -
1"). Trying to transfer more than that (e.g., with a large SPI flash
read) will cause the driver to hang.

Now, it seems that while theoretically we should be able to program
CTRLR1 with 0xffff, and get a 64KiB transfer, but that also seems to
cause the core to choke, so stick with a maximum of 64K - 1 bytes --
i.e., 0xffff.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-07-20 17:42:47 +01:00
..
2015-12-07 20:09:09 +00:00
2011-06-06 01:16:30 -06:00
2011-06-06 01:16:30 -06:00
2014-12-22 15:32:42 +00:00