Quentin Schulz d1ab8b54b2 clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent ...

commit 933bf364e152cd60902cf9585c2ba310d593e69f upstream.

clk_cifout is derived from clk_cifout_src through an integer divider
limited to 32. clk_cifout_src is a child of either cpll, gpll or npll
without any possibility of a divider of any sort. The default clock
parent is cpll.

Let's allow clk_cifout to ask its parent clk_cifout_src to reparent in
order to find the real closest possible rate for clk_cifout and not one
derived from cpll only.

Cc: stable@vger.kernel.org # 4.10+
Fixes: fd8bc82933 ("clk: rockchip: fix the rk3399 cifout clock")
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20221117-rk3399-cifout-set-rate-parent-v1-0-432548d04081@theobroma-systems.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2023-05-17 11:47:36 +02:00

..

clk-cpu.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19 17:09:55 +02:00

clk-ddr.c

clk: rockchip: Export rockchip_clk_register_ddrclk()

2020-09-22 15:16:37 +02:00

clk-half-divider.c

clk: rockchip: Initialize hw to error to avoid undefined behavior

2020-10-07 19:08:38 -07:00

clk-inverter.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk-mmc-phase.c

clk: rockchip: fix mmc get phase

2020-03-06 12:06:01 -08:00

clk-muxgrf.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282

2019-06-05 17:36:37 +02:00

clk-pll.c

clk: rockchip: Fix memory leak in rockchip_clk_register_pll()

2023-01-14 10:15:31 +01:00

clk-px30.c

clk: rockchip: protect the pclk_usb_grf as critical on px30

2019-11-05 20:53:42 +01:00

clk-rk3036.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk-rk3128.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk-rk3188.c

clk: rockchip: add sclk_mac_lbtest to rk3188_critical_clocks

2020-07-22 20:05:19 +02:00

clk-rk3228.c

clk: rockchip: Fix initialization of mux_pll_src_4plls_p

2020-08-18 20:09:02 -07:00

clk-rk3288.c

clk: rockchip: use separate compatibles for rk3288w-cru

2020-07-05 12:18:29 +02:00

clk-rk3308.c

clk: rockchip: rk3308: drop unused mux_timer_src_p

2020-09-22 14:36:20 +02:00

clk-rk3328.c

clk: rockchip: Revert "fix wrong mmc sample phase shift for rk3328"

2020-07-08 16:22:10 +02:00

clk-rk3368.c

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2019-07-17 10:07:48 -07:00

clk-rk3399.c

clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent

2023-05-17 11:47:36 +02:00

clk-rv1108.c

clk: rockchip: Fix -Wunused-const-variable in rv1108 clk driver

2019-07-25 21:00:52 +02:00

clk.c

clk: rockchip: Export some clock common APIs for module drivers

2020-09-22 15:16:38 +02:00

clk.h

clk: rockchip: Add clock controller for the rk3308

2019-09-05 12:43:39 +02:00

Kconfig

clk: rockchip: rk3399: Support module build

2020-09-22 15:16:54 +02:00

Makefile

clk: rockchip: fix the clk config to support module build

2020-09-22 15:16:38 +02:00

softrst.c

clk: rockchip: Export rockchip_register_softrst()

2020-09-22 15:16:38 +02:00