
commit b9baf5c8c5c356757f4f9d8180b5e9d234065bc3 upstream. Workaround the Spectre BHB issues for Cortex-A15, Cortex-A57, Cortex-A72, Cortex-A73 and Cortex-A75. We also include Brahma B15 as well to be safe, which is affected by Spectre V2 in the same ways as Cortex-A15. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> [changes due to lack of SYSTEM_FREEING_INITMEM - gregkh] Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
59 lines
1.3 KiB
C
59 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/cpu.h>
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#include <linux/device.h>
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#include <asm/spectre.h>
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ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "Mitigation: __user pointer sanitization\n");
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}
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static unsigned int spectre_v2_state;
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static unsigned int spectre_v2_methods;
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void spectre_v2_update_state(unsigned int state, unsigned int method)
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{
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if (state > spectre_v2_state)
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spectre_v2_state = state;
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spectre_v2_methods |= method;
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}
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ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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const char *method;
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if (spectre_v2_state == SPECTRE_UNAFFECTED)
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return sprintf(buf, "%s\n", "Not affected");
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if (spectre_v2_state != SPECTRE_MITIGATED)
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return sprintf(buf, "%s\n", "Vulnerable");
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switch (spectre_v2_methods) {
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case SPECTRE_V2_METHOD_BPIALL:
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method = "Branch predictor hardening";
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break;
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case SPECTRE_V2_METHOD_ICIALLU:
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method = "I-cache invalidation";
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break;
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case SPECTRE_V2_METHOD_SMC:
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case SPECTRE_V2_METHOD_HVC:
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method = "Firmware call";
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break;
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case SPECTRE_V2_METHOD_LOOP8:
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method = "History overwrite";
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break;
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default:
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method = "Multiple mitigations";
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break;
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}
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return sprintf(buf, "Mitigation: %s\n", method);
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}
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