f1565c24b5
Use the DMA API bypass mechanism for direct window mappings. This uses
common code and speed up the direct mapping case by avoiding indirect
calls just when not using dma ops at all. It also fixes a problem where
the sync_* methods were using the bypass check for DMA allocations, but
those are part of the streaming ops.
Note that this patch loses the DMA_ATTR_WEAK_ORDERING override, which
has never been well defined, as is only used by a few drivers, which
IIRC never showed up in the typical Cell blade setups that are affected
by the ordering workaround.
Fixes: efd176a04b ("powerpc/pseries/dma: Allow SWIOTLB")
Signed-off-by: Christoph Hellwig <hch@lst.de>
Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
54 lines
1.0 KiB
C
54 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Arch specific extensions to struct device
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*/
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#ifndef _ASM_POWERPC_DEVICE_H
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#define _ASM_POWERPC_DEVICE_H
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struct device_node;
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#ifdef CONFIG_PPC64
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struct pci_dn;
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struct iommu_table;
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#endif
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/*
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* Arch extensions to struct device.
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*
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* When adding fields, consider macio_add_one_device in
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* drivers/macintosh/macio_asic.c
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*/
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struct dev_archdata {
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/*
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* These two used to be a union. However, with the hybrid ops we need
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* both so here we store both a DMA offset for direct mappings and
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* an iommu_table for remapped DMA.
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*/
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dma_addr_t dma_offset;
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#ifdef CONFIG_PPC64
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struct iommu_table *iommu_table_base;
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#endif
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#ifdef CONFIG_IOMMU_API
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void *iommu_domain;
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#endif
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#ifdef CONFIG_PPC64
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struct pci_dn *pci_data;
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#endif
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#ifdef CONFIG_EEH
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struct eeh_dev *edev;
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#endif
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#ifdef CONFIG_FAIL_IOMMU
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int fail_iommu;
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#endif
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#ifdef CONFIG_CXL_BASE
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struct cxl_context *cxl_ctx;
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#endif
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};
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struct pdev_archdata {
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u64 dma_mask;
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};
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#endif /* _ASM_POWERPC_DEVICE_H */
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