892204e06c
Pull MIPS updates from James Hogan:
"These are the main MIPS changes for 4.15.
Fixes:
- ralink: Fix MT7620 PCI build issues (4.5)
- Disable cmpxchg64() and HAVE_VIRT_CPU_ACCOUNTING_GEN for 32-bit SMP
(4.1)
- Fix MIPS64 FP save/restore on 32-bit kernels (4.0)
- ptrace: Pick up ptrace/seccomp changed syscall numbers (3.19)
- ralink: Fix MT7628 pinmux (3.19)
- BCM47XX: Fix LED inversion on WRT54GSv1 (3.17)
- Fix n32 core dumping as o32 since regset support (3.13)
- ralink: Drop obsolete USB_ARCH_HAS_HCD select
Build system:
- Default to "generic" (multiplatform) system type instead of IP22
- Use generic little endian MIPS32 r2 configuration as default
defconfig instead of ip22_defconfig
FPU emulation:
- Fix exception generation for certain R6 FPU instructions
SMP:
- Allow __cpu_number_map to be larger than NR_CPUS for sparse CPU id
spaces
Miscellaneous:
- Add iomem resource for kernel bss section for kexec/kdump
- Atomics: Nudge writes on bit unlock
- DT files: Standardise "ok" -> "okay"
Minor cleanups:
- Define virt_to_pfn()
- Make thread_saved_pc static
- Simplify 32-bit sign extension in __read_64bit_c0_split()
- DMA: Use vma_pages() helper
- FPU emulation: Replace unsigned with unsigned int
- MM: Removed unused lastpfn
- Alchemy: Make clk_ops const
- Lasat: Use setup_timer() helper
- ralink: Use BIT() in MT7620 PCI driver
Platform support:
BMIPS:
- Enable HARDIRQS_SW_RESEND
Broadcom BCM63XX:
- Add clkdev lookup support
- Update clk driver, UART driver, DTs to handle named refclk from DTs
- Split apart various clocks to more closely match hardware
- Add ethernet clocks
Cavium Octeon:
- Remove usage of cvmx_wait() in favour of __delay()
ImgTec Pistachio:
- DT: Drop deprecated dwmmc num-slots property
Ingenic JZ4780:
- Add NFS root to Ci20 defconfig
- Add watchdog to Ci20 DT & defconfig, and allow building of watchdog
driver with this SoC
Generic (multiplatform):
- Migrate xilfpga (MIPSfpga) platform to the generic platform
Lantiq xway:
- Fix ASC0/ASC1 clocks"
* tag 'mips_4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (46 commits)
MIPS: Add iomem resource for kernel bss section.
MIPS: cmpxchg64() and HAVE_VIRT_CPU_ACCOUNTING_GEN don't work for 32-bit SMP
MIPS: BMIPS: Enable HARDIRQS_SW_RESEND
MIPS: pci: Make use of the BIT() macro inside the mt7620 driver
MIPS: pci: Remove KERN_WARN instance inside the mt7620 driver
MIPS: pci: Remove duplicate define in mt7620 driver
MIPS: ralink: Fix typo in mt7628 pinmux function
MIPS: ralink: Fix MT7628 pinmux
MIPS: Fix odd fp register warnings with MIPS64r2
watchdog: jz4780: Allow selection of jz4740-wdt driver
MIPS/ptrace: Update syscall nr on register changes
MIPS/ptrace: Pick up ptrace/seccomp changed syscalls
MIPS: Fix an n32 core file generation regset support regression
MIPS: Fix MIPS64 FP save/restore on 32-bit kernels
MIPS: page.h: Define virt_to_pfn()
MIPS: Xilfpga: Switch to using generic defconfigs
MIPS: generic: Add support for MIPSfpga
MIPS: Set defconfig target to a generic system for 32r2el
MIPS: Kconfig: Set default MIPS system type as generic
MIPS: DTS: Remove num-slots from Pistachio SoC
...
110 lines
1.6 KiB
Plaintext
110 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
|
|
/dts-v1/;
|
|
|
|
/include/ "bcm63268.dtsi"
|
|
|
|
/ {
|
|
compatible = "comtrend,vr-3032u", "brcm,bcm63268";
|
|
model = "Comtrend VR-3032u";
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x04000000>;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200";
|
|
stdout-path = &uart0;
|
|
};
|
|
};
|
|
|
|
&leds0 {
|
|
status = "okay";
|
|
brcm,serial-leds;
|
|
brcm,serial-dat-low;
|
|
brcm,serial-shift-inv;
|
|
|
|
led@0 {
|
|
reg = <0>;
|
|
brcm,hardware-controlled;
|
|
brcm,link-signal-sources = <0>;
|
|
/* GPHY0 Speed 0 */
|
|
};
|
|
led@1 {
|
|
reg = <1>;
|
|
brcm,hardware-controlled;
|
|
brcm,link-signal-sources = <1>;
|
|
/* GPHY0 Speed 1 */
|
|
};
|
|
led@2 {
|
|
reg = <2>;
|
|
active-low;
|
|
label = "vr-3032u:red:inet";
|
|
};
|
|
led@3 {
|
|
reg = <3>;
|
|
active-low;
|
|
label = "vr-3032u:green:dsl";
|
|
};
|
|
led@4 {
|
|
reg = <4>;
|
|
active-low;
|
|
label = "vr-3032u:green:usb";
|
|
};
|
|
led@7 {
|
|
reg = <7>;
|
|
active-low;
|
|
label = "vr-3032u:green:wps";
|
|
};
|
|
led@8 {
|
|
reg = <8>;
|
|
active-low;
|
|
label = "vr-3032u:green:inet";
|
|
};
|
|
led@9 {
|
|
reg = <9>;
|
|
brcm,hardware-controlled;
|
|
/* EPHY0 Activity */
|
|
};
|
|
led@10 {
|
|
reg = <10>;
|
|
brcm,hardware-controlled;
|
|
/* EPHY1 Activity */
|
|
};
|
|
led@11 {
|
|
reg = <11>;
|
|
brcm,hardware-controlled;
|
|
/* EPHY2 Activity */
|
|
};
|
|
led@12 {
|
|
reg = <12>;
|
|
brcm,hardware-controlled;
|
|
/* GPHY0 Activity */
|
|
};
|
|
led@13 {
|
|
reg = <13>;
|
|
brcm,hardware-controlled;
|
|
/* EPHY0 Speed */
|
|
};
|
|
led@14 {
|
|
reg = <14>;
|
|
brcm,hardware-controlled;
|
|
/* EPHY1 Speed */
|
|
};
|
|
led@15 {
|
|
reg = <15>;
|
|
brcm,hardware-controlled;
|
|
/* EPHY2 Speed */
|
|
};
|
|
led@20 {
|
|
reg = <20>;
|
|
active-low;
|
|
label = "vr-3032u:green:power";
|
|
default-state = "on";
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
status = "okay";
|
|
};
|