2babd6ea43
The hdec interrupt handler is reported to sometimes fire in Linux if KVM leaves it pending after a guest exists. This is harmless, so there is a no-op handler for it. The interrupt handler currently uses the regular kernel stack. Change this to avoid touching the stack entirely. This should be the last place where the regular Linux stack can be accessed with asynchronous interrupts (including PMI) soft-masked. It might be possible to take advantage of this invariant, e.g., to context switch the kernel stack SLB entry without clearing MSR[EE]. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200225173541.1549955-17-npiggin@gmail.com
199 lines
4.3 KiB
C
199 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Common time prototypes and such for all ppc machines.
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*
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* Written by Cort Dougan (cort@cs.nmt.edu) to merge
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* Paul Mackerras' version and mine for PReP and Pmac.
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*/
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#ifndef __POWERPC_TIME_H
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#define __POWERPC_TIME_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <linux/percpu.h>
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#include <asm/processor.h>
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#include <asm/cpu_has_feature.h>
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/* time.c */
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extern unsigned long tb_ticks_per_jiffy;
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extern unsigned long tb_ticks_per_usec;
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extern unsigned long tb_ticks_per_sec;
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extern struct clock_event_device decrementer_clockevent;
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extern void generic_calibrate_decr(void);
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/* Some sane defaults: 125 MHz timebase, 1GHz processor */
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extern unsigned long ppc_proc_freq;
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#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
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extern unsigned long ppc_tb_freq;
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#define DEFAULT_TB_FREQ 125000000UL
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extern bool tb_invalid;
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struct div_result {
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u64 result_high;
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u64 result_low;
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};
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/* Accessor functions for the timebase (RTC on 601) registers. */
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/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
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#define __USE_RTC() (IS_ENABLED(CONFIG_PPC_BOOK3S_601))
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#ifdef CONFIG_PPC64
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/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
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#define get_tbl get_tb
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#else
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static inline unsigned long get_tbl(void)
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{
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#if defined(CONFIG_403GCX)
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unsigned long tbl;
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asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
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return tbl;
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#else
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return mftbl();
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#endif
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}
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static inline unsigned int get_tbu(void)
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{
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#ifdef CONFIG_403GCX
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unsigned int tbu;
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asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
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return tbu;
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#else
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return mftbu();
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#endif
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}
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#endif /* !CONFIG_PPC64 */
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static inline unsigned int get_rtcl(void)
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{
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unsigned int rtcl;
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asm volatile("mfrtcl %0" : "=r" (rtcl));
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return rtcl;
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}
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static inline u64 get_rtc(void)
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{
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unsigned int hi, lo, hi2;
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do {
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asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
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: "=r" (hi), "=r" (lo), "=r" (hi2));
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} while (hi2 != hi);
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return (u64)hi * 1000000000 + lo;
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}
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static inline u64 get_vtb(void)
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{
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#ifdef CONFIG_PPC_BOOK3S_64
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if (cpu_has_feature(CPU_FTR_ARCH_207S))
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return mfspr(SPRN_VTB);
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#endif
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return 0;
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}
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#ifdef CONFIG_PPC64
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static inline u64 get_tb(void)
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{
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return mftb();
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}
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#else /* CONFIG_PPC64 */
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static inline u64 get_tb(void)
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{
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unsigned int tbhi, tblo, tbhi2;
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do {
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tbhi = get_tbu();
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tblo = get_tbl();
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tbhi2 = get_tbu();
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} while (tbhi != tbhi2);
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return ((u64)tbhi << 32) | tblo;
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}
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#endif /* !CONFIG_PPC64 */
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static inline u64 get_tb_or_rtc(void)
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{
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return __USE_RTC() ? get_rtc() : get_tb();
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}
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static inline void set_tb(unsigned int upper, unsigned int lower)
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{
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mtspr(SPRN_TBWL, 0);
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mtspr(SPRN_TBWU, upper);
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mtspr(SPRN_TBWL, lower);
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}
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/* Accessor functions for the decrementer register.
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* The 4xx doesn't even have a decrementer. I tried to use the
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* generic timer interrupt code, which seems OK, with the 4xx PIT
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* in auto-reload mode. The problem is PIT stops counting when it
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* hits zero. If it would wrap, we could use it just like a decrementer.
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*/
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static inline u64 get_dec(void)
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{
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#if defined(CONFIG_40x)
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return (mfspr(SPRN_PIT));
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#else
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return (mfspr(SPRN_DEC));
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#endif
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}
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/*
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* Note: Book E and 4xx processors differ from other PowerPC processors
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* in when the decrementer generates its interrupt: on the 1 to 0
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* transition for Book E/4xx, but on the 0 to -1 transition for others.
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*/
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static inline void set_dec(u64 val)
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{
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#if defined(CONFIG_40x)
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mtspr(SPRN_PIT, (u32) val);
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#else
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#ifndef CONFIG_BOOKE
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--val;
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#endif
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mtspr(SPRN_DEC, val);
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#endif /* not 40x */
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}
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static inline unsigned long tb_ticks_since(unsigned long tstamp)
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{
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if (__USE_RTC()) {
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int delta = get_rtcl() - (unsigned int) tstamp;
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return delta < 0 ? delta + 1000000000 : delta;
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}
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return get_tbl() - tstamp;
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}
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#define mulhwu(x,y) \
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({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
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#ifdef CONFIG_PPC64
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#define mulhdu(x,y) \
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({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
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#else
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extern u64 mulhdu(u64, u64);
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#endif
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extern void div128_by_32(u64 dividend_high, u64 dividend_low,
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unsigned divisor, struct div_result *dr);
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extern void secondary_cpu_time_init(void);
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extern void __init time_init(void);
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DECLARE_PER_CPU(u64, decrementers_next_tb);
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/* Convert timebase ticks to nanoseconds */
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unsigned long long tb_to_ns(unsigned long long tb_ticks);
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#endif /* __KERNEL__ */
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#endif /* __POWERPC_TIME_H */
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