Jack Xiao 2a8bfa139a drm/amd/powerplay/smu11: disable PLL shutdown when gfxoff enabled ...

MP1 cannot access clock IP during MP1 FW reload, disable PLL
shutdown as a workaround.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2019-06-21 18:59:28 -05:00

..

acp

treewide: Add SPDX license identifier - Makefile/Kconfig

2019-05-21 10:50:46 +02:00

amdgpu

drm/amdgpu/VCN2.0: remove powergating for UVDW tile

2019-06-21 18:59:28 -05:00

amdkfd

drm/amdkfd: Add navi10 support to amdkfd. (v3)

2019-06-21 18:59:24 -05:00

display

drm/amd/display: move dcn v1_0 irq source header to ivsrcid/dcn/

2019-06-20 21:35:30 -05:00

include

drm/amdgpu/mes10.1: add ip block mes10.1 (v2)

2019-06-21 18:58:22 -05:00

powerplay

drm/amd/powerplay/smu11: disable PLL shutdown when gfxoff enabled

2019-06-21 18:59:28 -05:00