71e2f4dd5a
As later model of GSx64 family processors including 2-series-soc have similar design with initial loongson3a while loongson2e/f seems less identical, we separate loongson2e/f support code out of mach-loongson64 to make our life easier. This patch contains mostly file moving works. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> [paulburton@kernel.org: Squash in the MAINTAINERS updates] Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: paul.burton@mips.com
50 lines
1.2 KiB
C
50 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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* Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
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*
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* Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
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* Author: Fuxin Zhang, zhangfx@lemote.com
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*/
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#include <linux/interrupt.h>
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#include <linux/compiler.h>
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#include <loongson.h>
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static inline void bonito_irq_enable(struct irq_data *d)
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{
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LOONGSON_INTENSET = (1 << (d->irq - LOONGSON_IRQ_BASE));
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mmiowb();
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}
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static inline void bonito_irq_disable(struct irq_data *d)
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{
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LOONGSON_INTENCLR = (1 << (d->irq - LOONGSON_IRQ_BASE));
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mmiowb();
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}
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static struct irq_chip bonito_irq_type = {
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.name = "bonito_irq",
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.irq_mask = bonito_irq_disable,
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.irq_unmask = bonito_irq_enable,
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};
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static struct irqaction __maybe_unused dma_timeout_irqaction = {
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.handler = no_action,
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.name = "dma_timeout",
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};
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void bonito_irq_init(void)
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{
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u32 i;
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for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++)
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irq_set_chip_and_handler(i, &bonito_irq_type,
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handle_level_irq);
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#ifdef CONFIG_CPU_LOONGSON2E
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setup_irq(LOONGSON_IRQ_BASE + 10, &dma_timeout_irqaction);
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#endif
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}
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