1fc5dce78a
Manipulating the SVE architectural state, including the vector and predicate registers, first-fault register and the vector length, requires the use of dedicated instructions added by SVE. This patch adds suitable assembly functions for saving and restoring the SVE registers and querying the vector length. Setting of the vector length is done as part of register restore. Since people building kernels may not all get an SVE-enabled toolchain for a while, this patch uses macros that generate explicit opcodes in place of assembler mnemonics. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
82 lines
2.2 KiB
C
82 lines
2.2 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_FP_H
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#define __ASM_FP_H
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#include <asm/ptrace.h>
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#ifndef __ASSEMBLY__
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/*
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* FP/SIMD storage area has:
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* - FPSR and FPCR
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* - 32 128-bit data registers
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*
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* Note that user_fpsimd forms a prefix of this structure, which is
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* relied upon in the ptrace FP/SIMD accessors.
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*/
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struct fpsimd_state {
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union {
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struct user_fpsimd_state user_fpsimd;
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struct {
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__uint128_t vregs[32];
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u32 fpsr;
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u32 fpcr;
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};
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};
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/* the id of the last cpu to have restored this state */
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unsigned int cpu;
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};
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#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
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/* Masks for extracting the FPSR and FPCR from the FPSCR */
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#define VFP_FPSCR_STAT_MASK 0xf800009f
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#define VFP_FPSCR_CTRL_MASK 0x07f79f00
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/*
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* The VFP state has 32x64-bit registers and a single 32-bit
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* control/status register.
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*/
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#define VFP_STATE_SIZE ((32 * 8) + 4)
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#endif
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struct task_struct;
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extern void fpsimd_save_state(struct fpsimd_state *state);
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extern void fpsimd_load_state(struct fpsimd_state *state);
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extern void fpsimd_thread_switch(struct task_struct *next);
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extern void fpsimd_flush_thread(void);
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extern void fpsimd_preserve_current_state(void);
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extern void fpsimd_restore_current_state(void);
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extern void fpsimd_update_current_state(struct fpsimd_state *state);
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extern void fpsimd_flush_task_state(struct task_struct *target);
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extern void sve_save_state(void *state, u32 *pfpsr);
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extern void sve_load_state(void const *state, u32 const *pfpsr,
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unsigned long vq_minus_1);
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extern unsigned int sve_get_vl(void);
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/* For use by EFI runtime services calls only */
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extern void __efi_fpsimd_begin(void);
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extern void __efi_fpsimd_end(void);
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#endif
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#endif
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