
commit c241ed2f0ea549c18cff62a3708b43846b84dae3 upstream.
From Ard:
"Simply disabling -mgeneral-regs-only left and right is risky, given that
the standard AArch64 ABI permits the use of FP/SIMD registers anywhere,
and GCC is known to use SIMD registers for spilling, and may invent
other uses of the FP/SIMD register file that have nothing to do with the
floating point code in question. Note that putting kernel_neon_begin()
and kernel_neon_end() around the code that does use FP is not sufficient
here, the problem is in all the other code that may be emitted with
references to SIMD registers in it.
So the only way to do this properly is to put all floating point code in
a separate compilation unit, and only compile that unit with
-mgeneral-regs-only."
Disable support until the code can be properly refactored to support this
properly on aarch64.
Acked-by: Will Deacon <will@kernel.org>
Reported-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[ardb: backport to v5.10 by reverting c38d444e44
instead]
Acked-by: Alex Deucher <alexander.deucher@amd.com> # v5.10 backport
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
50 lines
1.4 KiB
Plaintext
50 lines
1.4 KiB
Plaintext
# SPDX-License-Identifier: MIT
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menu "Display Engine Configuration"
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depends on DRM && DRM_AMDGPU
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config DRM_AMD_DC
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bool "AMD DC - Enable new display engine"
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default y
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select SND_HDA_COMPONENT if SND_HDA_CORE
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select DRM_AMD_DC_DCN if (X86 || PPC64) && !(KCOV_INSTRUMENT_ALL && KCOV_ENABLE_COMPARISONS)
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help
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Choose this option if you want to use the new display engine
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support for AMDGPU. This adds required support for Vega and
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Raven ASICs.
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config DRM_AMD_DC_DCN
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def_bool n
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help
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Raven, Navi and Renoir family support for display engine
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config DRM_AMD_DC_DCN3_0
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bool "DCN 3.0 family"
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depends on DRM_AMD_DC && X86
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depends on DRM_AMD_DC_DCN
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help
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Choose this option if you want to have
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sienna_cichlid support for display engine
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config DRM_AMD_DC_HDCP
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bool "Enable HDCP support in DC"
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depends on DRM_AMD_DC
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help
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Choose this option if you want to support HDCP authentication.
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config DRM_AMD_DC_SI
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bool "AMD DC support for Southern Islands ASICs"
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default n
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help
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Choose this option to enable new AMD DC support for SI asics
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by default. This includes Tahiti, Pitcairn, Cape Verde, Oland.
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Hainan is not supported by AMD DC and it has no physical DCE6.
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config DEBUG_KERNEL_DC
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bool "Enable kgdb break in DC"
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depends on DRM_AMD_DC
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depends on KGDB
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help
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Choose this option if you want to hit kdgb_break in assert.
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endmenu
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