Files
android_kernel_xiaomi_sm8450/drivers/gpu/drm
Eric Yang 133e8e1b35 drm/amd/display: Change how we disable pipe split
Before this change, pipe split was disabled by bumping up dpp clock
bounding box for DPM level 0 and 1, this allows validation to pass
without splitting at a lower DPM level. This change reverts this
and instead lowers display clock at DPM level 0, this forces
configurations that need pipe split at DPM level 0 to go to
DPM level 1, where they can be driven without split.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 18:08:40 -04:00
..
2017-08-29 06:20:31 +10:00
2017-08-10 11:26:49 +10:00
2017-08-18 09:10:46 +02:00
2017-08-16 21:35:57 +02:00
2017-08-11 10:49:21 +02:00