
Pull PCI updates from Bjorn Helgaas: "Resource management: - Add support for Enhanced Allocation devices (Sean O. Stalley) - Add Enhanced Allocation register entries (Sean O. Stalley) - Handle IORESOURCE_PCI_FIXED when sizing resources (David Daney) - Handle IORESOURCE_PCI_FIXED when assigning resources (David Daney) - Handle Enhanced Allocation capability for SR-IOV devices (David Daney) - Clear IORESOURCE_UNSET when reverting to firmware-assigned address (Bjorn Helgaas) - Make Enhanced Allocation bitmasks more obvious (Bjorn Helgaas) - Expand Enhanced Allocation BAR output (Bjorn Helgaas) - Add of_pci_check_probe_only to parse "linux,pci-probe-only" (Marc Zyngier) - Fix lookup of linux,pci-probe-only property (Marc Zyngier) - Add sparc mem64 resource parsing for root bus (Yinghai Lu) PCI device hotplug: - pciehp: Queue power work requests in dedicated function (Guenter Roeck) Driver binding: - Add builtin_pci_driver() to avoid registration boilerplate (Paul Gortmaker) Virtualization: - Set SR-IOV NumVFs to zero after enumeration (Alexander Duyck) - Remove redundant validation of SR-IOV offset/stride registers (Alexander Duyck) - Remove VFs in reverse order if virtfn_add() fails (Alexander Duyck) - Reorder pcibios_sriov_disable() (Alexander Duyck) - Wait 1 second between disabling VFs and clearing NumVFs (Alexander Duyck) - Fix sriov_enable() error path for pcibios_enable_sriov() failures (Alexander Duyck) - Enable SR-IOV ARI Capable Hierarchy before reading TotalVFs (Ben Shelton) - Don't try to restore VF BARs (Wei Yang) MSI: - Don't alloc pcibios-irq when MSI is enabled (Joerg Roedel) - Add msi_controller setup_irqs() method for special multivector setup (Lucas Stach) - Export all remapped MSIs to sysfs attributes (Romain Bezut) - Disable MSI on SiS 761 (Ondrej Zary) AER: - Clear error status registers during enumeration and restore (Taku Izumi) Generic host bridge driver: - Fix lookup of linux,pci-probe-only property (Marc Zyngier) - Allow multiple hosts with different map_bus() methods (David Daney) - Pass starting bus number to pci_scan_root_bus() (David Daney) - Fix address window calculation for non-zero starting bus (David Daney) Altera host bridge driver: - Add msi.h to ARM Kbuild (Ley Foon Tan) - Add Altera PCIe host controller driver (Ley Foon Tan) - Add Altera PCIe MSI driver (Ley Foon Tan) APM X-Gene host bridge driver: - Remove msi_controller assignment (Duc Dang) Broadcom iProc host bridge driver: - Fix header comment "Corporation" misspelling (Florian Fainelli) - Fix code comment to match code (Ray Jui) - Remove unused struct iproc_pcie.irqs[] (Ray Jui) - Call pci_fixup_irqs() for ARM64 as well as ARM (Ray Jui) - Fix PCIe reset logic (Ray Jui) - Improve link detection logic (Ray Jui) - Update PCIe device tree bindings (Ray Jui) - Add outbound mapping support (Ray Jui) Freescale i.MX6 host bridge driver: - Return real error code from imx6_add_pcie_port() (Fabio Estevam) - Add PCIE_PHY_RX_ASIC_OUT_VALID definition (Fabio Estevam) Freescale Layerscape host bridge driver: - Remove ls_pcie_establish_link() (Minghuan Lian) - Ignore PCIe controllers in Endpoint mode (Minghuan Lian) - Factor out SCFG related function (Minghuan Lian) - Update ls_add_pcie_port() (Minghuan Lian) - Remove unused fields from struct ls_pcie (Minghuan Lian) - Add support for LS1043a and LS2080a (Minghuan Lian) - Add ls_pcie_msi_host_init() (Minghuan Lian) HiSilicon host bridge driver: - Add HiSilicon SoC Hip05 PCIe driver (Zhou Wang) Marvell MVEBU host bridge driver: - Return zero for reserved or unimplemented config space (Russell King) - Use exact config access size; don't read/modify/write (Russell King) - Use of_get_available_child_count() (Russell King) - Use for_each_available_child_of_node() to walk child nodes (Russell King) - Report full node name when reporting a DT error (Russell King) - Use port->name rather than "PCIe%d.%d" (Russell King) - Move port parsing and resource claiming to separate function (Russell King) - Fix memory leaks and refcount leaks (Russell King) - Split port parsing and resource claiming from port setup (Russell King) - Use gpio_set_value_cansleep() (Russell King) - Use devm_kcalloc() to allocate an array (Russell King) - Use gpio_desc to carry around gpio (Russell King) - Improve clock/reset handling (Russell King) - Add PCI Express root complex capability block (Russell King) - Remove code restricting accesses to slot 0 (Russell King) NVIDIA Tegra host bridge driver: - Wrap static pgprot_t initializer with __pgprot() (Ard Biesheuvel) Renesas R-Car host bridge driver: - Build pci-rcar-gen2.c only on ARM (Geert Uytterhoeven) - Build pcie-rcar.c only on ARM (Geert Uytterhoeven) - Make PCI aware of the I/O resources (Phil Edworthy) - Remove dependency on ARM-specific struct hw_pci (Phil Edworthy) - Set root bus nr to that provided in DT (Phil Edworthy) - Fix I/O offset for multiple host bridges (Phil Edworthy) ST Microelectronics SPEAr13xx host bridge driver: - Fix dw_pcie_cfg_read/write() usage (Gabriele Paoloni) Synopsys DesignWare host bridge driver: - Make "clocks" and "clock-names" optional DT properties (Bhupesh Sharma) - Use exact access size in dw_pcie_cfg_read() (Gabriele Paoloni) - Simplify dw_pcie_cfg_read/write() interfaces (Gabriele Paoloni) - Require config accesses to be naturally aligned (Gabriele Paoloni) - Make "num-lanes" an optional DT property (Gabriele Paoloni) - Move calculation of bus addresses to DRA7xx (Gabriele Paoloni) - Replace ARM pci_sys_data->align_resource with global function pointer (Gabriele Paoloni) - Factor out MSI msg setup (Lucas Stach) - Implement multivector MSI IRQ setup (Lucas Stach) - Make get_msi_addr() return phys_addr_t, not u32 (Lucas Stach) - Set up high part of MSI target address (Lucas Stach) - Fix PORT_LOGIC_LINK_WIDTH_MASK (Zhou Wang) - Revert "PCI: designware: Program ATU with untranslated address" (Zhou Wang) - Use of_pci_get_host_bridge_resources() to parse DT (Zhou Wang) - Make driver arch-agnostic (Zhou Wang) Miscellaneous: - Make x86 pci_subsys_init() static (Alexander Kuleshov) - Turn off Request Attributes to avoid Chelsio T5 Completion erratum (Hariprasad Shenai)" * tag 'pci-v4.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (94 commits) PCI: altera: Add Altera PCIe MSI driver PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver PCI: layerscape: Add ls_pcie_msi_host_init() PCI: layerscape: Add support for LS1043a and LS2080a PCI: layerscape: Remove unused fields from struct ls_pcie PCI: layerscape: Update ls_add_pcie_port() PCI: layerscape: Factor out SCFG related function PCI: layerscape: Ignore PCIe controllers in Endpoint mode PCI: layerscape: Remove ls_pcie_establish_link() PCI: designware: Make "clocks" and "clock-names" optional DT properties PCI: designware: Make driver arch-agnostic ARM/PCI: Replace pci_sys_data->align_resource with global function pointer PCI: designware: Use of_pci_get_host_bridge_resources() to parse DT Revert "PCI: designware: Program ATU with untranslated address" PCI: designware: Move calculation of bus addresses to DRA7xx PCI: designware: Make "num-lanes" an optional DT property PCI: designware: Require config accesses to be naturally aligned PCI: designware: Simplify dw_pcie_cfg_read/write() interfaces PCI: designware: Use exact access size in dw_pcie_cfg_read() PCI: spear: Fix dw_pcie_cfg_read/write() usage ...
315 lines
7.9 KiB
C
315 lines
7.9 KiB
C
/*
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* Copyright Altera Corporation (C) 2013-2015. All rights reserved
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/interrupt.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/module.h>
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#include <linux/msi.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_pci.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define MSI_STATUS 0x0
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#define MSI_ERROR 0x4
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#define MSI_INTMASK 0x8
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#define MAX_MSI_VECTORS 32
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struct altera_msi {
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DECLARE_BITMAP(used, MAX_MSI_VECTORS);
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struct mutex lock; /* protect "used" bitmap */
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struct platform_device *pdev;
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struct irq_domain *msi_domain;
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struct irq_domain *inner_domain;
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void __iomem *csr_base;
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void __iomem *vector_base;
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phys_addr_t vector_phy;
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u32 num_of_vectors;
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int irq;
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};
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static inline void msi_writel(struct altera_msi *msi, const u32 value,
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const u32 reg)
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{
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writel_relaxed(value, msi->csr_base + reg);
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}
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static inline u32 msi_readl(struct altera_msi *msi, const u32 reg)
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{
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return readl_relaxed(msi->csr_base + reg);
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}
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static void altera_msi_isr(struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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struct altera_msi *msi;
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unsigned long status;
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u32 num_of_vectors;
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u32 bit;
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u32 virq;
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chained_irq_enter(chip, desc);
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msi = irq_desc_get_handler_data(desc);
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num_of_vectors = msi->num_of_vectors;
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while ((status = msi_readl(msi, MSI_STATUS)) != 0) {
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for_each_set_bit(bit, &status, msi->num_of_vectors) {
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/* Dummy read from vector to clear the interrupt */
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readl_relaxed(msi->vector_base + (bit * sizeof(u32)));
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virq = irq_find_mapping(msi->inner_domain, bit);
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if (virq)
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generic_handle_irq(virq);
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else
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dev_err(&msi->pdev->dev, "unexpected MSI\n");
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}
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}
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chained_irq_exit(chip, desc);
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}
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static struct irq_chip altera_msi_irq_chip = {
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.name = "Altera PCIe MSI",
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.irq_mask = pci_msi_mask_irq,
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.irq_unmask = pci_msi_unmask_irq,
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};
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static struct msi_domain_info altera_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX),
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.chip = &altera_msi_irq_chip,
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};
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static void altera_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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{
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struct altera_msi *msi = irq_data_get_irq_chip_data(data);
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phys_addr_t addr = msi->vector_phy + (data->hwirq * sizeof(u32));
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msg->address_lo = lower_32_bits(addr);
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msg->address_hi = upper_32_bits(addr);
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msg->data = data->hwirq;
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dev_dbg(&msi->pdev->dev, "msi#%d address_hi %#x address_lo %#x\n",
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(int)data->hwirq, msg->address_hi, msg->address_lo);
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}
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static int altera_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static struct irq_chip altera_msi_bottom_irq_chip = {
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.name = "Altera MSI",
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.irq_compose_msi_msg = altera_compose_msi_msg,
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.irq_set_affinity = altera_msi_set_affinity,
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};
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static int altera_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *args)
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{
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struct altera_msi *msi = domain->host_data;
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unsigned long bit;
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u32 mask;
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WARN_ON(nr_irqs != 1);
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mutex_lock(&msi->lock);
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bit = find_first_zero_bit(msi->used, msi->num_of_vectors);
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if (bit >= msi->num_of_vectors) {
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mutex_unlock(&msi->lock);
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return -ENOSPC;
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}
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set_bit(bit, msi->used);
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mutex_unlock(&msi->lock);
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irq_domain_set_info(domain, virq, bit, &altera_msi_bottom_irq_chip,
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domain->host_data, handle_simple_irq,
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NULL, NULL);
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mask = msi_readl(msi, MSI_INTMASK);
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mask |= 1 << bit;
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msi_writel(msi, mask, MSI_INTMASK);
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return 0;
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}
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static void altera_irq_domain_free(struct irq_domain *domain,
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unsigned int virq, unsigned int nr_irqs)
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{
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struct irq_data *d = irq_domain_get_irq_data(domain, virq);
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struct altera_msi *msi = irq_data_get_irq_chip_data(d);
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u32 mask;
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mutex_lock(&msi->lock);
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if (!test_bit(d->hwirq, msi->used)) {
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dev_err(&msi->pdev->dev, "trying to free unused MSI#%lu\n",
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d->hwirq);
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} else {
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__clear_bit(d->hwirq, msi->used);
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mask = msi_readl(msi, MSI_INTMASK);
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mask &= ~(1 << d->hwirq);
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msi_writel(msi, mask, MSI_INTMASK);
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}
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mutex_unlock(&msi->lock);
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}
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static const struct irq_domain_ops msi_domain_ops = {
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.alloc = altera_irq_domain_alloc,
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.free = altera_irq_domain_free,
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};
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static int altera_allocate_domains(struct altera_msi *msi)
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{
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struct fwnode_handle *fwnode = of_node_to_fwnode(msi->pdev->dev.of_node);
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msi->inner_domain = irq_domain_add_linear(NULL, msi->num_of_vectors,
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&msi_domain_ops, msi);
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if (!msi->inner_domain) {
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dev_err(&msi->pdev->dev, "failed to create IRQ domain\n");
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return -ENOMEM;
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}
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msi->msi_domain = pci_msi_create_irq_domain(fwnode,
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&altera_msi_domain_info, msi->inner_domain);
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if (!msi->msi_domain) {
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dev_err(&msi->pdev->dev, "failed to create MSI domain\n");
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irq_domain_remove(msi->inner_domain);
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return -ENOMEM;
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}
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return 0;
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}
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static void altera_free_domains(struct altera_msi *msi)
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{
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irq_domain_remove(msi->msi_domain);
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irq_domain_remove(msi->inner_domain);
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}
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static int altera_msi_remove(struct platform_device *pdev)
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{
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struct altera_msi *msi = platform_get_drvdata(pdev);
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msi_writel(msi, 0, MSI_INTMASK);
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irq_set_chained_handler(msi->irq, NULL);
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irq_set_handler_data(msi->irq, NULL);
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altera_free_domains(msi);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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static int altera_msi_probe(struct platform_device *pdev)
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{
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struct altera_msi *msi;
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struct device_node *np = pdev->dev.of_node;
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struct resource *res;
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int ret;
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msi = devm_kzalloc(&pdev->dev, sizeof(struct altera_msi),
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GFP_KERNEL);
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if (!msi)
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return -ENOMEM;
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mutex_init(&msi->lock);
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msi->pdev = pdev;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "csr");
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if (!res) {
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dev_err(&pdev->dev, "no csr memory resource defined\n");
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return -ENODEV;
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}
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msi->csr_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(msi->csr_base)) {
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dev_err(&pdev->dev, "failed to map csr memory\n");
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return PTR_ERR(msi->csr_base);
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}
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"vector_slave");
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if (!res) {
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dev_err(&pdev->dev, "no vector_slave memory resource defined\n");
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return -ENODEV;
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}
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msi->vector_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(msi->vector_base)) {
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dev_err(&pdev->dev, "failed to map vector_slave memory\n");
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return PTR_ERR(msi->vector_base);
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}
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msi->vector_phy = res->start;
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if (of_property_read_u32(np, "num-vectors", &msi->num_of_vectors)) {
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dev_err(&pdev->dev, "failed to parse the number of vectors\n");
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return -EINVAL;
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}
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ret = altera_allocate_domains(msi);
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if (ret)
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return ret;
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msi->irq = platform_get_irq(pdev, 0);
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if (msi->irq <= 0) {
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dev_err(&pdev->dev, "failed to map IRQ: %d\n", msi->irq);
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ret = -ENODEV;
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goto err;
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}
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irq_set_chained_handler_and_data(msi->irq, altera_msi_isr, msi);
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platform_set_drvdata(pdev, msi);
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return 0;
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err:
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altera_msi_remove(pdev);
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return ret;
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}
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static const struct of_device_id altera_msi_of_match[] = {
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{ .compatible = "altr,msi-1.0", NULL },
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{ },
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};
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static struct platform_driver altera_msi_driver = {
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.driver = {
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.name = "altera-msi",
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.of_match_table = altera_msi_of_match,
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},
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.probe = altera_msi_probe,
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.remove = altera_msi_remove,
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};
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static int __init altera_msi_init(void)
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{
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return platform_driver_register(&altera_msi_driver);
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}
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subsys_initcall(altera_msi_init);
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MODULE_AUTHOR("Ley Foon Tan <lftan@altera.com>");
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MODULE_DESCRIPTION("Altera PCIe MSI support");
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MODULE_LICENSE("GPL v2");
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