50fa3cd33f
This patch adds decriptions for mt2712 IOMMU and SMI.
In order to balance the bandwidth, mt2712 has two M4Us, two
smi-commons, 10 smi-larbs. and mt2712 is also MTK IOMMU gen2 which
uses ARM Short-Descriptor translation table format.
The mt2712 M4U-SMI HW diagram is as below:
EMI
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------------------------------------
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M4U0 M4U1
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smi-common0 smi-common1
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------------------------- --------------------------------
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larb0 larb1 larb2 larb3 larb6 larb4 larb5 larb7 larb8 larb9
disp0 vdec cam venc jpg mdp1/disp1 mdp2/disp2 mdp3 vdo/nr tvd
All the connections are HW fixed, SW can NOT adjust it.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
44 lines
1.4 KiB
Plaintext
44 lines
1.4 KiB
Plaintext
SMI (Smart Multimedia Interface) Local Arbiter
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The hardware block diagram please check bindings/iommu/mediatek,iommu.txt
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Required properties:
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- compatible : must be one of :
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"mediatek,mt2701-smi-larb"
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"mediatek,mt2712-smi-larb"
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"mediatek,mt8173-smi-larb"
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- reg : the register and size of this local arbiter.
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- mediatek,smi : a phandle to the smi_common node.
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- power-domains : a phandle to the power domain of this local arbiter.
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- clocks : Must contain an entry for each entry in clock-names.
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- clock-names: must contain 2 entries, as follows:
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- "apb" : Advanced Peripheral Bus clock, It's the clock for setting
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the register.
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- "smi" : It's the clock for transfer data and command.
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Required property for mt2701 and mt2712:
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- mediatek,larb-id :the hardware id of this larb.
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Example:
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larb1: larb@16010000 {
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compatible = "mediatek,mt8173-smi-larb";
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reg = <0 0x16010000 0 0x1000>;
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mediatek,smi = <&smi_common>;
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power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
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clocks = <&vdecsys CLK_VDEC_CKEN>,
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<&vdecsys CLK_VDEC_LARB_CKEN>;
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clock-names = "apb", "smi";
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};
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Example for mt2701:
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larb0: larb@14010000 {
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compatible = "mediatek,mt2701-smi-larb";
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reg = <0 0x14010000 0 0x1000>;
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mediatek,smi = <&smi_common>;
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mediatek,larb-id = <0>;
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clocks = <&mmsys CLK_MM_SMI_LARB0>,
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<&mmsys CLK_MM_SMI_LARB0>;
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clock-names = "apb", "smi";
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power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
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};
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