Rob Clark 034fbcc3d8 drm/msm: hdmi phy 8960 phy pll ...

On downstream kernel the clk driver directly bangs hdmi phy registers.
For upstream kernel, we need to model this as a clock and register with
the clock framework.

Signed-off-by: Rob Clark <robdclark@gmail.com>

2014-08-04 11:55:28 -04:00

..

hdmi_audio.c

drm/msm: hdmi audio support

2014-03-31 10:27:45 -04:00

hdmi_bridge.c

drm/msm: hdmi audio support

2014-03-31 10:27:45 -04:00

hdmi_connector.c

Merge tag 'topic/core-stuff-2014-06-30' of git://anongit.freedesktop.org/drm-intel into drm-next

2014-07-08 11:04:35 +10:00

hdmi_i2c.c

drm/msm: basic KMS driver for snapdragon

2013-08-24 14:57:07 -04:00

hdmi_phy_8x60.c

drm/msm: basic KMS driver for snapdragon

2013-08-24 14:57:07 -04:00

hdmi_phy_8x74.c

drm/msm: add hdmi support for apq8x74/mdp5

2014-01-09 14:44:05 -05:00

hdmi_phy_8960.c

drm/msm: hdmi phy 8960 phy pll

2014-08-04 11:55:28 -04:00

hdmi.c

drm/msm: DT support for 8960/8064 (v3)

2014-08-04 11:55:28 -04:00

hdmi.h

drm/msm/hdmi: set hdp clock rate before prepare_enable

2014-06-22 08:32:09 -04:00

hdmi.xml.h

drm/msm: update generated headers

2014-08-04 11:55:28 -04:00

qfprom.xml.h

drm/msm: update generated headers

2014-08-04 11:55:28 -04:00