022c03a2d6
Add support for the A15 generic timer and clocksource. As the timer generates interrupts on a different PPI depending on the execution mode (normal or secure), it is possible to register two different PPIs. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
20 lines
314 B
C
20 lines
314 B
C
#ifndef __ASMARM_ARCH_TIMER_H
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#define __ASMARM_ARCH_TIMER_H
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#include <linux/ioport.h>
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struct arch_timer {
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struct resource res[2];
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};
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#ifdef CONFIG_ARM_ARCH_TIMER
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int arch_timer_register(struct arch_timer *);
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#else
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static inline int arch_timer_register(struct arch_timer *at)
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{
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return -ENXIO;
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}
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#endif
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#endif
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