755a9ba7bf
Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ...
91 lines
2.9 KiB
C
91 lines
2.9 KiB
C
/*
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* This header provides constants for OMAP pinctrl bindings.
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*
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* Copyright (C) 2009 Nokia
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* Copyright (C) 2009-2010 Texas Instruments
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*/
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#ifndef _DT_BINDINGS_PINCTRL_OMAP_H
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#define _DT_BINDINGS_PINCTRL_OMAP_H
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/* 34xx mux mode options for each pin. See TRM for options */
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#define MUX_MODE0 0
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#define MUX_MODE1 1
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#define MUX_MODE2 2
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#define MUX_MODE3 3
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#define MUX_MODE4 4
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#define MUX_MODE5 5
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#define MUX_MODE6 6
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#define MUX_MODE7 7
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/* 24xx/34xx mux bit defines */
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#define PULL_ENA (1 << 3)
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#define PULL_UP (1 << 4)
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#define ALTELECTRICALSEL (1 << 5)
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/* omap3/4/5 specific mux bit defines */
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#define INPUT_EN (1 << 8)
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#define OFF_EN (1 << 9)
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#define OFFOUT_EN (1 << 10)
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#define OFFOUT_VAL (1 << 11)
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#define OFF_PULL_EN (1 << 12)
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#define OFF_PULL_UP (1 << 13)
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#define WAKEUP_EN (1 << 14)
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#define WAKEUP_EVENT (1 << 15)
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/* Active pin states */
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#define PIN_OUTPUT 0
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#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
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#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
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#define PIN_INPUT INPUT_EN
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#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
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#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
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/* Off mode states */
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#define PIN_OFF_NONE 0
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#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
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#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
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#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
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#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
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#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
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/*
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* Macros to allow using the absolute physical address instead of the
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* padconf registers instead of the offset from padconf base.
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*/
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#define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
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#define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val)
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#define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
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#define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
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#define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val)
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#define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
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#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
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#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
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#define AM4372_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
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#define DRA7XX_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x3400) (val)
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/*
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* Macros to allow using the offset from the padconf physical address
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* instead of the offset from padconf base.
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*/
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#define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
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#define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
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#define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
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/*
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* Define some commonly used pins configured by the boards.
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* Note that some boards use alternative pins, so check
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* the schematics before using these.
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*/
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#define OMAP3_UART1_RX 0x152
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#define OMAP3_UART2_RX 0x14a
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#define OMAP3_UART3_RX 0x16e
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#define OMAP4_UART2_RX 0xdc
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#define OMAP4_UART3_RX 0x104
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#define OMAP4_UART4_RX 0x11c
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#endif
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