cc07aabc53
Pull arm64 updates from Catalin Marinas: - Optimised assembly string/memory routines (based on the AArch64 Cortex Strings library contributed to glibc but re-licensed under GPLv2) - Optimised crypto algorithms making use of the ARMv8 crypto extensions (together with kernel API for using FPSIMD instructions in interrupt context) - Ftrace support - CPU topology parsing from DT - ESR_EL1 (Exception Syndrome Register) exposed to user space signal handlers for SIGSEGV/SIGBUS (useful to emulation tools like Qemu) - 1GB section linear mapping if applicable - Barriers usage clean-up - Default pgprot clean-up Conflicts as per Catalin. * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (57 commits) arm64: kernel: initialize broadcast hrtimer based clock event device arm64: ftrace: Add system call tracepoint arm64: ftrace: Add CALLER_ADDRx macros arm64: ftrace: Add dynamic ftrace support arm64: Add ftrace support ftrace: Add arm64 support to recordmcount arm64: Add 'notrace' attribute to unwind_frame() for ftrace arm64: add __ASSEMBLY__ in asm/insn.h arm64: Fix linker script entry point arm64: lib: Implement optimized string length routines arm64: lib: Implement optimized string compare routines arm64: lib: Implement optimized memcmp routine arm64: lib: Implement optimized memset routine arm64: lib: Implement optimized memmove routine arm64: lib: Implement optimized memcpy routine arm64: defconfig: enable a few more common/useful options in defconfig ftrace: Make CALLER_ADDRx macros more generic arm64: Fix deadlock scenario with smp_send_stop() arm64: Fix machine_shutdown() definition arm64: Support arch_irq_work_raise() via self IPIs ...
107 lines
2.7 KiB
C
107 lines
2.7 KiB
C
/*
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* Based on arch/arm/include/asm/barrier.h
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*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_BARRIER_H
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#define __ASM_BARRIER_H
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#ifndef __ASSEMBLY__
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#define sev() asm volatile("sev" : : : "memory")
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#define wfe() asm volatile("wfe" : : : "memory")
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#define wfi() asm volatile("wfi" : : : "memory")
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#define isb() asm volatile("isb" : : : "memory")
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#define dmb(opt) asm volatile("dmb " #opt : : : "memory")
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#define dsb(opt) asm volatile("dsb " #opt : : : "memory")
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#define mb() dsb(sy)
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#define rmb() dsb(ld)
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#define wmb() dsb(st)
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#ifndef CONFIG_SMP
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#define smp_mb() barrier()
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#define smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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barrier(); \
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ACCESS_ONCE(*p) = (v); \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1 = ACCESS_ONCE(*p); \
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compiletime_assert_atomic_type(*p); \
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barrier(); \
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___p1; \
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})
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#else
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#define smp_mb() dmb(ish)
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#define smp_rmb() dmb(ishld)
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#define smp_wmb() dmb(ishst)
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#define smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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switch (sizeof(*p)) { \
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case 4: \
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asm volatile ("stlr %w1, %0" \
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: "=Q" (*p) : "r" (v) : "memory"); \
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break; \
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case 8: \
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asm volatile ("stlr %1, %0" \
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: "=Q" (*p) : "r" (v) : "memory"); \
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break; \
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} \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1; \
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compiletime_assert_atomic_type(*p); \
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switch (sizeof(*p)) { \
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case 4: \
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asm volatile ("ldar %w0, %1" \
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: "=r" (___p1) : "Q" (*p) : "memory"); \
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break; \
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case 8: \
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asm volatile ("ldar %0, %1" \
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: "=r" (___p1) : "Q" (*p) : "memory"); \
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break; \
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} \
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___p1; \
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})
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#endif
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#define read_barrier_depends() do { } while(0)
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#define smp_read_barrier_depends() do { } while(0)
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#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
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#define nop() asm volatile("nop");
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#define smp_mb__before_atomic() smp_mb()
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#define smp_mb__after_atomic() smp_mb()
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_BARRIER_H */
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