Neil Armstrong
|
9e05e49c29
|
clk: meson-g12a: fix VPU clock parents
First two VPU clock parents are wrong, fix it here.
Fixes: 085a4ea93d ("clk: meson: g12a: add peripheral clock controller")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190313135503.3198-1-narmstrong@baylibre.com
|
2019-03-19 17:38:41 +01:00 |
|
Maxime Jourdan
|
f53b9f146f
|
clk: meson: g12a: fix VPU clock muxes mask
There are 8 parents, use 0x7
Fixes: 085a4ea93d ("clk: meson: g12a: add peripheral clock controller")
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190319082611.6215-1-mjourdan@baylibre.com
|
2019-03-19 17:38:00 +01:00 |
|
Jerome Brunet
|
6682bd4d44
|
clk: meson: factorise meson64 peripheral clock controller drivers
The function used to probe the peripheral clock controller of the arm64
amlogic SoCs is mostly the same. We now have 3 of those controllers so
it is time to factorize things a bit.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190201145345.6795-5-jbrunet@baylibre.com
|
2019-02-04 09:52:11 +01:00 |
|
Jian Hu
|
085a4ea93d
|
clk: meson: g12a: add peripheral clock controller
Add the peripheral clock controller found in the g12a SoC family
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190201145345.6795-4-jbrunet@baylibre.com
|
2019-02-04 09:52:11 +01:00 |
|