Moves the RTC DT node's "status" property from exynos5250 board
(arndale & snow) dts files to exynos5250.dtsi, since the bindings
in exynos5250.dtsi depicts the RTC h/w completely.
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
DEBUG_UNCOMPRESS was previously disallowed for Tegra due to tegra.S's
use of global data that was not linked into the decompressor. Solve this
by declaring this symbol in tegra.S when it is being built into the
decompressor. For the kernel proper, leave the declaration in
mach-tegra/common.c as explained in the comment.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The generic option DEBUG_LL_UART_PL01X is now used to select the UART
type for the kernel low-level debugging on the ep93xx platform. This
enables two config options to provide the physical and virtual base
address of the debug UART.
Use the generic options instead of providing platform specific options
to select the debug UART.
UART1 is selected with: DEBUG_UART_PHYS = 0x808c0000
DEBUG_UART_VIRT = 0xfedc0000
UART2 is selected with: DEBUG_UART_PHYS = 0x808d0000
DEBUG_UART_VIRT = 0xfedd0000
UART3 is selected with: DEBUG_UART_PHYS = 0x808e0000
DEBUG_UART_VIRT = 0xfede0000
The selected UART must already be initialized by the bootloader. If it
isn't setup nothing will appear (which might be desired).
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The SPEAr debug code is a copy of the PL01x debugging code, so rather
than have this pointless code duplication, lets just use the standard
implementation instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Davinci's debugging is just a copy of the old 8250_32 code with a
different base address. Incorporate this into the generic 8250
debug code.
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Keystone's debugging is just a copy of the old 8250_32 code with a
different base address. Incorporate this into the generic 8250
debug code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Provide generic option choices for 8250 and PL01x UART ports; these can
now be selected by UART type rather than asking about the platform.
This means that a kernel configuration user can manually choose the
various parameters of the debug UART without resorting to the platform
having to encode the possible settings.
These two generic options are preferred over further debug entries for
these ports; the existing options which refer back to the 8250 and PL01x
ports are now considered deprecated.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Now that the PL01X debug include can mostly stand alone without
requiring platforms to provide any macros, move it into the debug
directory so it can be directly included. This allows us to get rid of
a lot of debug-macros include files.
The autodetect case for Versatile Express and the ux500 are left alone;
these are more complicated implementations.
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the definition of the UART register addresses out of the platform
specific header files into the Kconfig files.
Acked-by: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Now that the 8250 debug include can stand alone without requiring
platforms to provide any macros, move it into the debug directory
so it can be directly included. This allows us to get rid of a lot
of debug-macros include files.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the definition of the UART register addresses out of the platform
specific header file into the Kconfig files.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the definition of the UART register shift out of the platform
specific header file into the Kconfig files.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It is silly to bury UART selection under multiple levels of choice
statements, where the top level choice statement will only list
about four entries when a single SoC is selected. Move the UART
selection up into the top level choice statement as it was always
intended to be.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The DEBUG_LL_UART_NONE option was moved from the top of the list to
the bottom - unfortunately, it still referred to the options "below"
rather than "above".
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The C99 types uintXX_t that are usually defined in 'stdint.h' are not as
unambiguous on ARM as you would expect. For the types below, there is a
difference on ARM between GCC built for bare metal ARM, GCC built for glibc
and the kernel itself, which results in build errors if you try to build with
-ffreestanding and include 'stdint.h' (such as when you include 'arm_neon.h'
in order to use NEON intrinsics)
As the typedefs for these types in 'stdint.h' are based on builtin defines
supplied by GCC, we can tweak these to align with the kernel's idea of those
types, so 'linux/types.h' and 'stdint.h' can be safely included from the same
source file (provided that -ffreestanding is used).
int32_t uint32_t uintptr_t
bare metal GCC long unsigned long unsigned int
glibc GCC int unsigned int unsigned int
kernel int unsigned int unsigned long
Acked by: Dave Martin <dave.martin@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add ADV7180 platform devices on the Marzen board, configure VIN1/3 pins, and
register VIN1/3 devices with the ADV7180 specific platform data.
[Sergei: removed superfluous tabulation and inserted empty lines in the macro
definition, updated the copyrights, annotated VIN platform data as '__initdata']
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Add VIN clocks and platform devices for R8A7779 SoC; add function to register
the VIN platform devices.
[Sergei: added 'id' parameter check to r8a7779_add_vin_device(), used '*pdata'
in *sizeof* operator there, renamed some variables, annotated vin[0-3]_resources
[] and 'vin[0-3]_info' as '__initdata'.]
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The MMCIF and SHDI platform data .set_pwr() callbacks are used to
control the vmmc/vqmmc power supplies. As the power supplies already
register control GPIOs there's no need to perform the operation
manually. Remove the callback functions.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
Pass the CD and RO GPIO numbers to the MMC SPI and SDHI drivers and
remove the custom .get_cd() and .get_ro() callback functions.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
pxa910_set_wake() & mmp2_set_wake() are both declared in head files
of arch/arm/mach-mmp/include/mach directory. If we include these
head files in irq-mmp driver, it blocks the multiplatform build.
So adjust the code.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Support IRQCHIP & CONFIG_MULTI_IRQ_HANDLER in irq-mmp driver.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Reviewed-by: Daniel Drake <dsd@laptop.org>
Move irq-mmp driver from mach-mmp directory into irqchip directory.
It's used to support multiple platform.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Add ML86V7667 platform devices on BOCK-W board, configure VIN0/1 pins, and
register VIN0/1 devices with the ML86V7667 specific platform data.
[Sergei: some macro/comment cleanup; updated the copyrights, removed duplicate
'sh_eth' driver being enabled before registering VIN1 due to a pin conflict,
removed superfluous semicolon after iclink[01]_ml86v7667' initializer.]
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Add VIN clocks and platform devices on R8A7778 SoC; add function to register
the VIN platform devices.
[Sergei: added 'id' parameter check to r8a7778_add_vin_device(), used '*pdata'
in *sizeof* operator, and added an empty line there; renamed some variables,
annotated 'vin[01]_info' and vin[01]_resources[] as '__initdata'.]
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
C293PCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module.
- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
- 512MB soldered DDR3 32bit memory
- CPLD System Logic
- 64MB x16 NOR flash and 4GB x8 NAND flash
- 16MB SPI flash
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Update the 64-bit hibernation code to support Book E CPUs.
Some registers and instructions are not defined for Book3e
(SDR reg, tlbia instruction).
SDR: Storage Description Register. Book3S and Book3E have different
address translation mode, we do not need HTABORG & HTABSIZE to
translate virtual address to real address.
More registers are saved in BookE-64bit.(TCR, SPRG1)
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Add this file to help detect cpu type in runtime.
These macros will be more favorable for driver
to apply errata and workaround to specified cpu type.
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
prepare C preprocessor support when processing MPC512x DTS files
- switch from DTS syntax to CPP syntax for include specs
- create a symlink such that DTS processing can reference includes
Signed-off-by: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
reword the clock control module's registers declaration such that the
MCLK related registers form an array and get indexed by PSC controller
or CAN controller component number
this change is in preparation to COMMON_CLK support for the MPC512x
platform, the changed declaration remains neutral to existing code since
the PSC and MSCAN CCR fields declared here aren't referenced elsewhere
Signed-off-by: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
From Shawn Guo:
It contains mxs soc changes for 3.12.
- Run savedefconfig on mxs_defconfig to clean it up
- Fix on mxs_restart() routine for interrupt context calling
- A few other random updates and cleanups
* tag 'mxs-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: pm: Include "pm.h"
ARM: mxs: Simplify detection of CrystalFontz boards
ARM: mach-mxs: Remove "TO" string from revision field
ARM: mxs: Fix BUG() when invoking mxs_restart() from interrupt context
ARM: mxs: Allow DT clock providers
ARM: mxs_defconfig: Cleanup mxs_defconfig
From Shawn Guo:
It contains the imx device tree updates for 3.12.
- New pinctrl entry additions for various peripherals
- Devices enabling for imx6, imx5 and imx27 boards
- Add missing device nodes like iim, owire, audmux and sram, etc.
- Various updates on boards like phytec, wandboard and sabresd
- Consolidate pad macros between imx6q and imx6dl
* tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (92 commits)
ARM: dts: vf610-twr: enable i2c0 device
ARM: dts: i.MX51: Add one more I2C2 pinmux entry
ARM: dts: i.MX51: Move pins configuration under "iomuxc" label
ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog
ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator
ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX
ARM: dts: i.MX27: Disable AUDMUX in the template
ARM: dts: wandboard: Add support for SDIO bcm4329
ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template
ARM: dts: imx53-qsb: Make USBH1 functional
ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module
ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module
ARM: dts: imx6qdl-sabresd: Add touchscreen support
ARM: imx: add ocram clock for imx53
ARM: dts: imx: ocram size is different between imx6q and imx6dl
ARM: dts: imx27-phytec-phycore-som: Fix regulator settings
ARM: dts: i.MX27: Remove clock name from CPU node
ARM: dts: i.MX27: Increase "clock-latency" value
ARM: dts: i.MX27: Add label to CPU node
ARM: dts: i.MX27: Remove optional "ptp" clock source for FEC
...
Signed-off-by: Kevin Hilman <khilman@linaro.org>
From Shawn Guo:
It contains a bunch of imx soc updates for 3.12.
- Add more ethernet phy fixups for imx6 boards
- Add some missing imx6q clocks into clock driver
- Add new clock types fixup mux and div to work around some ugly
hardware defect
- Consolidate L2 cache initialization function, so that it can be used
on more i.MX SoCs
- Replace magic numbers in mach-imx6q.c with well defined macros
- Small fixes for imx6q and pllv3 clock drivers
- Some random updates on imx defconfig files
* tag 'imx-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (33 commits)
phy: micrel: Add definitions for common Micrel PHY registers
ARM: imx: Re-select CONFIG_SND_SOC_IMX_MC13783 option
ARM: imx: Move anatop related from board file to anatop driver
ARM: imx_v6_v7_defconfig: Enable wireless support
ARM: imx_v4_v5_defconfig: Cleanup imx_v4_v5_defconfig
ARM: imx_v6_v7_defconfig: Add SATA support
ARM: imx_v6_v7_defconfig: Cleanup imx_v6_v7_defconfig
ARM: mx53: Allow suspend/resume
ARM: mach-imx: Select ARM_CPU_SUSPEND at ARCH_MXC level
ARM: imx_v6_v7_defconfig: Select CONFIG_TOUCHSCREEN_EGALAX
ARM: imx6q: add vdoa gate clock
ARM: imx6q: add the missing cko output selection
ARM: imx6q: add cko2 clocks
ARM: imx6q: add spdif gate clock
ARM: imx: clk-pllv3: improve the timeout waiting method
ARM: imx6: change some clocks to fixup clocks
ARM: imx: add common clock support for fixup mux
ARM: imx: add common clock support for fixup div
ARM: imx: Select MIGHT_HAVE_CACHE_L2X0
ARM: imx: fix imx_init_l2cache storage class
...
Pointers passed to ARAnyM NatFeat calls should be physical addresses,
not virtual addresses. This worked before because on Atari, physical and
virtual kernel addresses are the same, as long as normal kernel memory
is concerned.
Correct the few remaining places where virtual addresses were used.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
When running a multi-platform kernel on Atari, warning messages like
the following may be printed:
WARNING: at /root/linux-3.10.1/init/main.c:698 do_one_initcall+0x12e/0x13a()
initcall param_sysfs_init+0x0/0x1a4 returned with disabled interrupts
This is caused by the different definitions of ALLOWINT for Atari and
other platforms:
#if defined(MACH_ATARI_ONLY)
#define ALLOWINT (~0x500)
#else
#define ALLOWINT (~0x700)
#endif
On Atari, we want to disable the high-frequency HSYNC interrupt:
- On Atari-only kernels, this is handled completely through ALLOWINT,
- On multi-platform kernels, this is handled by disabling the HSYNC
interrupt from the interrupt handler.
However, as in the latter case arch_irqs_disabled_flags() didn't ignore the
disabling of the HSYNC interrupt, irqs_disabled() would detect false
positives.
Ignore the HSYNC interrupt when running on Atari to fix this.
For single-platform kernels this test is optimized away by the compiler.
Reported-by: Thorsten Glaser <tg@debian.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Tested-by: Thorsten Glaser <tg@debian.org>
This patch adds alwon powerdomain support for TI81XX, which is required
for stable functioning of a big number of TI81XX subsystems.
Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
