Pull ARM SoC driver updates from Olof Johansson:
"Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
soc: fsl: add RCPM driver
dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
memory: tegra: Consolidate registers definition into common header
memory: tegra: Ensure timing control debug features are disabled
memory: tegra: Introduce Tegra30 EMC driver
memory: tegra: Do not handle error from wait_for_completion_timeout()
memory: tegra: Increase handshake timeout on Tegra20
memory: tegra: Print a brief info message about EMC timings
memory: tegra: Pre-configure debug register on Tegra20
memory: tegra: Include io.h instead of iopoll.h
memory: tegra: Adapt for Tegra20 clock driver changes
memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
memory: tegra: Add gr2d and gr3d to DRM IOMMU group
memory: tegra: Set DMA mask based on supported address bits
soc: at91: Add Atmel SFR SN (Serial Number) support
memory: atmel-ebi: switch to SPDX license identifiers
memory: atmel-ebi: move NUM_CS definition inside EBI driver
soc: mediatek: Refactor bus protection control
soc: mediatek: Refactor sram control
...
Pull dmaengine updates from Vinod Koul:
"Here are the changes this time around, couple of new drivers and
updates to few more:
- New drivers for SiFive PDMA, Socionext Milbeaut HDMAC and XDMAC,
Freescale dpaa2 qDMA
- Support for X1000 in JZ4780
- Xilinx dma updates and support for Xilinx AXI MCDM controller
- New bindings for rcar R8A774B1
- Minor updates to dw, dma-jz4780, ti-edma, sprd drivers"
* tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (61 commits)
dmaengine: Fix Kconfig indentation
dmaengine: sf-pdma: move macro to header file
dmaengine: sf-pdma: replace /** with /* for non-function comment
dmaengine: ti: edma: fix missed failure handling
dmaengine: mmp_pdma: add missed of_dma_controller_free
dmaengine: mmp_tdma: add missed of_dma_controller_free
dmaengine: sprd: Add wrap address support for link-list mode
MAINTAINERS: Add Green as SiFive PDMA driver maintainer
dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00
dt-bindings: dmaengine: sf-pdma: add bindins for SiFive PDMA
dmaengine: zx: remove: removed dmam_pool_destroy
dmaengine: mediatek: hsdma_probe: fixed a memory leak when devm_request_irq fails
dmaengine: iop-adma: clean up an indentation issue
dmaengine: milbeaut-xdmac: remove redundant error log
dmaengine: milbeaut-hdmac: remove redundant error log
dmaengine: dma-jz4780: add missed clk_disable_unprepare in remove
dmaengine: JZ4780: Add support for the X1000.
dt-bindings: dmaengine: Add X1000 bindings.
dmaengine: xilinx_dma: Add Xilinx AXI MCDMA Engine driver support
dmaengine: xilinx_dma: Extend dma_config struct to store irq routine handle
...
Pull clk updates from Stephen Boyd:
"This merge window we have one small clk provider API in the core
framework and then a bunch of driver updates and a handful of new
drivers. In terms of diffstat the Qualcomm and Amlogic drivers are
high up there because of all the clk data introcued by new drivers.
The Nvidia Tegra driver had a lot of work done this cycle too to
support suspend/resume and memory controllers. And the OMAP clk driver
got proper clk and reset handling in place.
Rounding out the patches are various updates to remove unused data,
mark things static, correct incorrect data in drivers, etc. All the
little things that improve drivers and maintain code health. I will
point out that there's a patch in here for the GPIO clk driver, that
almost nobody uses, which changes behavior and causes clk_set_rate()
to try to change the GPIO gate clk's parent. Other than that things
are fairly well SoC specific here.
Core:
- Add a clk provider API to get current parent index
- Plug a memory leak in clk_unregister() path
New Drivers:
- CGU in Ingenix X1000
- Bitmain BM1880 clks
- Qualcomm MSM8998 GPU clk controllers
- Qualcomm SC7180 GCC and RPMH clk controllers
- Qualcomm QCS404 Q6SSTOP clk controllers
- Add support for the Renesas R-Car M3-W+ (r8a77961) SoC
- Add support for the Renesas RZ/G2N (r8a774b1) SoC
- Add Tegra20/30 External Memory Clock (EMC) support
Updates:
- Make gpio gate clks propagate rate setting up to parent
- Prepare Armada 3700 for suspend to RAM by moving PCIe
suspend/resume priority
- Drop unused variables, enums, etc. in various clk drivers
- Convert various drivers to use devm_platform_ioremap_resource()
- Use struct_size() some more in various clk drivers
- Improve Rockchip px30 clk tree
- Add suspend/resume support to Tegra210 clk driver
- Reimplement SOR clks on earlier Tegra SoCs, helping HDMI and DP
- Allwinner DT exports and H6 clk tree fixes
- Proper clk and reset handling for OMAP SoCs
- Revamped TI divider clk to clamp max divider
- Make 1443X/1416X PLL clock structure common for reusing among i.MX8
SoCs
- Drop IMX7ULP_CLK_MIPI_PLL clock, it shouldn't be used
- Add VIDEO2_PLL clock for imx8mq
- Add missing gate clock for pll1/2 fixed dividers on i.MX8 SoCs
- Add sm1 support in the Amlogic audio clock controller
- Switch some clocks on R-Car Gen2/3 to .determine_rate()
- Remove Renesas R-Car Gen2 legacy DT clock support
- Improve arithmetic divisions on Renesas R-Car Gen2 and Gen3
- Improve Renesas R-Car Gen3 SD clock handling
- Add rate table for Samsung exynos542x GPU and VPLL clks
- Fix potential CPU performance degradation after system
suspend/resume cycle on exynos542x SoCs"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (160 commits)
clk: aspeed: Add RMII RCLK gates for both AST2500 MACs
MAINTAINERS: Add entry for BM1880 SoC clock driver
clk: Add common clock driver for BM1880 SoC
dt-bindings: clock: Add devicetree binding for BM1880 SoC
clk: Add clk_hw_unregister_composite helper function definition
clk: Zero init clk_init_data in helpers
clk: ingenic: Allow drivers to be built with COMPILE_TEST
MAINTAINERS: Update section for Ux500 clock drivers
clk: mark clk_disable_unused() as __init
clk: Fix memory leak in clk_unregister()
clk: Ingenic: Add CGU driver for X1000.
dt-bindings: clock: Add X1000 bindings.
clk: tegra: Use match_string() helper to simplify the code
clk: pxa: fix one of the pxa RTC clocks
clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle()
clk: armada-xp: remove unused code
clk: tegra: Fix build error without CONFIG_PM_SLEEP
clk: tegra: Add missing stubs for the case of !CONFIG_PM_SLEEP
clk: tegra: Optimize PLLX restore on Tegra20/30
clk: tegra: Add suspend and resume support on Tegra210
...
Pull staging / iio updates from Greg KH:
"Here is the big staging and iio set of patches for the 5.5-rc1
release.
It's the usual huge collection of cleanup patches all over the
drivers/staging/ area, along with a new staging driver, and a bunch of
new IIO drivers as well.
Full details are in the shortlog, but all of these have been in
linux-next for a long time with no reported issues"
* tag 'staging-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (548 commits)
staging: vchiq: Have vchiq_dump_* functions return an error code
staging: vchiq: Refactor indentation in vchiq_dump_* functions
staging: fwserial: Fix Kconfig indentation (seven spaces)
staging: vchiq_dump: Replace min with min_t
staging: vchiq: Fix block comment format in vchiq_dump()
staging: octeon: indent with tabs instead of spaces
staging: comedi: usbduxfast: usbduxfast_ai_cmdtest rounding error
staging: most: core: remove sysfs attr remove_link
staging: vc04: Fix Kconfig indentation
staging: pi433: Fix Kconfig indentation
staging: nvec: Fix Kconfig indentation
staging: most: Fix Kconfig indentation
staging: fwserial: Fix Kconfig indentation
staging: fbtft: Fix Kconfig indentation
fbtft: Drop OF dependency
fbtft: Make use of device property API
fbtft: Drop useless #ifdef CONFIG_OF and dead code
fbtft: Describe function parameters in kernel-doc
fbtft: Make sure string is NULL terminated
staging: rtl8723bs: remove set but not used variable 'change', 'pos'
...
Pull char/misc driver updates from Greg KH:
"Here is the big set of char/misc and other driver patches for 5.5-rc1
Loads of different things in here, this feels like the catch-all of
driver subsystems these days. Full details are in the shortlog, but
nothing major overall, just lots of driver updates and additions.
All of these have been in linux-next for a while with no reported
issues"
* tag 'char-misc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (198 commits)
char: Fix Kconfig indentation, continued
habanalabs: add more protection of device during reset
habanalabs: flush EQ workers in hard reset
habanalabs: make the reset code more consistent
habanalabs: expose reset counters via existing INFO IOCTL
habanalabs: make code more concise
habanalabs: use defines for F/W files
habanalabs: remove prints on successful device initialization
habanalabs: remove unnecessary checks
habanalabs: invalidate MMU cache only once
habanalabs: skip VA block list update in reset flow
habanalabs: optimize MMU unmap
habanalabs: prevent read/write from/to the device during hard reset
habanalabs: split MMU properties to PCI/DRAM
habanalabs: re-factor MMU masks and documentation
habanalabs: type specific MMU cache invalidation
habanalabs: re-factor memory module code
habanalabs: export uapi defines to user-space
habanalabs: don't print error when queues are full
habanalabs: increase max jobs number to 512
...
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for v5.5.
It is pretty much business as usual, the most interesting thing I
think is the pin controller for a new Intel chip called Lightning
Mountain, which is according to news reports some kind of embedded
network processor and what is surprising about it is that Intel have
decided to use device tree to describe the system rather than ACPI
that they have traditionally favored.
Core changes:
- Avoid taking direct references to device tree-supplied device
names: these may changed at runtime under certain circumstances to
kstrdup them.
GPIO related:
- Work is ongoing to move to passing the irqchip along as a templated
struct gpio_irq_chip when adding a standard gpiolib-based irqchip
to a GPIO controller, a few patches in this cycle switches a few
pin control drivers over to using this method.
New hardware support:
- Intel Lightning Mountain SoC pin controller and GPIO support, a
first Intel platform to use device tree rather than ACPI to
configure the system. News reports says that this SoC is a network
processor.
- Qualcomm MSM8976 and MSM8956
- Qualcomm PMIC GPIO now also supports PM6150 and PM6150L
- Qualcomm SPMI MPP and SPMI GPIO for PM8950 and PMI8950
- Rockchip RK3308
- Renesas R8A77961
- Allwinner Meson-A1
Driver improvements:
- get_multiple and set_multiple support for the AT91-PIO4 driver.
- Convert Qualcomm SSBI GPIO to use the hierarchical IRQ helpers in
the GPIOlib irqchip"
* tag 'pinctrl-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (93 commits)
pinctrl: ingenic: Add OTG VBUS pin for the JZ4770
pinctrl: ingenic: Handle PIN_CONFIG_OUTPUT config
pinctrl: Fix Kconfig indentation
pinctrl: lewisburg: Update pin list according to v1.1v6
MAINTAINERS: Replace my email by one @kernel.org
pinctrl: armada-37xx: Fix irq mask access in armada_37xx_irq_set_type()
dt-bindings: pinctrl: intel: Add for new SoC
pinctrl: Add pinmux & GPIO controller driver for a new SoC
pinctrl: rza1: remove unnecessary static inline function
pinctrl: meson: add pinctrl driver support for Meson-A1 SoC
pinctrl: meson: add a new callback for SoCs fixup
pinctrl: nomadik: db8500: Add mc0_a_2 pin group without direction control
dt-bindings: pinctrl: Convert generic pin mux and config properties to schema
pinctrl: cherryview: Missed type change to unsigned int
pinctrl: intel: Missed type change to unsigned int
pinctrl: use devm_platform_ioremap_resource() to simplify code
pinctrl: just return if no valid maps
dt-bindings: pinctrl: qcom-pmic-mpp: Add support for PM/PMI8950
pinctrl: qcom: spmi-mpp: Add PM/PMI8950 compatible strings
dt-bindings: pinctrl: qcom-pmic-gpio: Add support for PM/PMI8950
...
- Support CGU in Ingenix X1000
- Support Bitmain BM1880 clks
* clk-ingenic:
clk: ingenic: Allow drivers to be built with COMPILE_TEST
clk: Ingenic: Add CGU driver for X1000.
dt-bindings: clock: Add X1000 bindings.
* clk-init-leak:
clk: mark clk_disable_unused() as __init
clk: Fix memory leak in clk_unregister()
* clk-ux500:
MAINTAINERS: Update section for Ux500 clock drivers
* clk-bitmain:
MAINTAINERS: Add entry for BM1880 SoC clock driver
clk: Add common clock driver for BM1880 SoC
dt-bindings: clock: Add devicetree binding for BM1880 SoC
clk: Add clk_hw_unregister_composite helper function definition
clk: Zero init clk_init_data in helpers
- Make gpio gate clks propagate rate setting up to parent
* clk-gpio-flags:
clk: clk-gpio: propagate rate change to parent
* clk-tegra: (23 commits)
clk: tegra: Use match_string() helper to simplify the code
clk: tegra: Fix build error without CONFIG_PM_SLEEP
clk: tegra: Add missing stubs for the case of !CONFIG_PM_SLEEP
clk: tegra: Optimize PLLX restore on Tegra20/30
clk: tegra: Add suspend and resume support on Tegra210
clk: tegra: Share clk and rst register defines with Tegra clock driver
clk: tegra: Use fence_udelay() during PLLU init
clk: tegra: clk-dfll: Add suspend and resume support
clk: tegra: clk-super: Add restore-context support
clk: tegra: clk-super: Fix to enable PLLP branches to CPU
clk: tegra: periph: Add restore_context support
clk: tegra: Support for OSC context save and restore
clk: tegra: pll: Save and restore pll context
clk: tegra: pllout: Save and restore pllout context
clk: tegra: divider: Save and restore divider rate
clk: tegra: Reimplement SOR clocks on Tegra210
clk: tegra: Reimplement SOR clock on Tegra124
clk: tegra: Rename sor0_lvds to sor0_out
clk: tegra: Move SOR0 implementation to Tegra124
clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC
...
* clk-rockchip:
clk: rockchip: protect the pclk_usb_grf as critical on px30
clk: rockchip: add video-related niu clocks as critical on px30
clk: rockchip: move px30 critical clocks to correct clock controller
clk: rockchip: Add div50 clocks for px30 sdmmc, emmc, sdio and nandc
clk: rockchip: Add div50 clock-ids for sdmmc on px30 and nandc
clk: rockchip: make clk_half_divider_ops static
* clk-sprd:
clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle()
* clk-pxa:
clk: pxa: fix one of the pxa RTC clocks
Pull sound updates from Takashi Iwai:
"There have been some significant changes in the core side, both for
ALSA and ASoC, while lots of development have been seen in SOF, as
well as many small fixes/improvements for ASoC codecs and platforms.
Below is a highlight in this cycle:
Core:
- The unification of PCM vmalloc buffer allocation helpers into the
standard API
- Clean up of the default PCM mmap handling for vmalloc & SG-buffer
- Fix potential races at ALSA timer open
- A few new PCM API extensions; just preliminary core changes, the
actual changes in drivers will be merged in 5.6
- Continued ASoC componentization works; now almost everything is a
common ASoC component object. A lot of refactoring and
simplification have been done along with it.
ASoC:
- Many fixes to the Sound Open Firmware (SOF) code
- Wake on voice support for Chromebooks
- SPI support and trigger word detection for RT5677
- New drivers for Analog Devices ADAU7118, Intel Cannonlake systems
with RT1011 and RT5682, Texas Instruments TAS2562 and TAS2770
HD-audio:
- Improved Intel DSP configuration / probe code for SOF
- Plumbing the legacy HD-audio driver with Intel SOF HDMI
- DP-MST support for Nvidia HDMI codecs
- Realtek quirks cleanups and new additions as usual
Others:
- Lots of refactoring and cleanups for FireWire; period-size sharing,
h/w IRQ interval configuration, clock recovery improvements, etc
- USB-audio: Scarlett mixer quirks
- Cleanups of PCM calls in various drivers (including media and USB)
to adapt the core API changes"
* tag 'sound-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (497 commits)
ALSA: usb-audio: Fix Focusrite Scarlett 6i6 gen1 - input handling
ALSA: hda/realtek - Enable internal speaker of ASUS UX431FLC
ALSA: aloop: Fix dependency on timer API
ASoC: DMI long name - avoid to add board name if matches with product name
ASoC: improve the DMI long card code in asoc-core
ASoC: rsnd: fix DALIGN register for SSIU
ALSA: aloop: Avoid unexpected timer event callback tasklets
ALSA: aloop: Remove redundant locking in timer open function
ASoC: component: Add sync_stop PCM ops
ASoC: pcm: Make ioctl ops optional
ALSA: hda/hdmi - Clear codec->relaxed_resume flag at unbinding
ALSA: hda - Disable audio component for legacy Nvidia HDMI codecs
ALSA: cs4236: fix error return comparison of an unsigned integer
ALSA: usb-audio: Fix NULL dereference at parsing BADD
ALSA: usb-audio: Fix Scarlett 6i6 Gen 2 port data
ALSA: hda/realtek - Enable the headset-mic on a Xiaomi's laptop
ALSA: hda/realtek - Move some alc236 pintbls to fallback table
ALSA: hda/realtek - Move some alc256 pintbls to fallback table
ALSA: docs: Update about the new PCM sync_stop ops
ALSA: pcm: Add card sync_irq field
...
Pull power management updates from Rafael Wysocki:
"These include cpuidle changes to use nanoseconds (instead of
microseconds) as the unit of time and to simplify checks for disabled
idle states in the idle loop, some cpuidle fixes and governor updates,
assorted cpufreq updates (driver updates mostly and a few core fixes
and cleanups), devfreq updates (dominated by the tegra30 driver
changes), new CPU IDs for the RAPL power capping driver, relatively
minor updates of the generic power domains (genpd) and operation
performance points (OPP) frameworks, and assorted fixes and cleanups.
There are also two maintainer information updates: Chanwoo Choi will
be maintaining the devfreq subsystem going forward and Todd Brandt is
going to maintain the pm-graph utility (created by him).
Specifics:
- Use nanoseconds (instead of microseconds) as the unit of time in
the cpuidle core and simplify checks for disabled idle states in
the idle loop (Rafael Wysocki)
- Fix and clean up the teo cpuidle governor (Rafael Wysocki)
- Fix the cpuidle registration error code path (Zhenzhong Duan)
- Avoid excessive vmexits in the ACPI cpuidle driver (Yin Fengwei)
- Extend the idle injection infrastructure to be able to measure the
requested duration in nanoseconds and to allow an exit latency
limit for idle states to be specified (Daniel Lezcano)
- Fix cpufreq driver registration and clarify a comment in the
cpufreq core (Viresh Kumar)
- Add NULL checks to the show() and store() methods of sysfs
attributes exposed by cpufreq (Kai Shen)
- Update cpufreq drivers:
* Fix for a plain int as pointer warning from sparse in
intel_pstate (Jamal Shareef)
* Fix for a hardcoded number of CPUs and stack bloat in the
powernv driver (John Hubbard)
* Updates to the ti-cpufreq driver and DT files to support new
platforms and migrate bindings from opp-v1 to opp-v2 (Adam Ford,
H. Nikolaus Schaller)
* Merging of the arm_big_little and vexpress-spc drivers and
related cleanup (Sudeep Holla)
* Fix for imx's default speed grade value (Anson Huang)
* Minor cleanup of the s3c64xx driver (Nathan Chancellor)
* CPU speed bin detection fix for sun50i (Ondrej Jirman)
- Appoint Chanwoo Choi as the new devfreq maintainer.
- Update the devfreq core:
* Check NULL governor in available_governors_show sysfs to prevent
showing wrong governor information and fix a race condition
between devfreq_update_status() and trans_stat_show() (Leonard
Crestez)
* Add new 'interrupt-driven' flag for devfreq governors to allow
interrupt-driven governors to prevent the devfreq core from
polling devices for status (Dmitry Osipenko)
* Improve an error message in devfreq_add_device() (Matthias
Kaehlcke)
- Update devfreq drivers:
* tegra30 driver fixes and cleanups (Dmitry Osipenko)
* Removal of unused property from dt-binding documentation for the
exynos-bus driver (Kamil Konieczny)
* exynos-ppmu cleanup and DT bindings update (Lukasz Luba, Marek
Szyprowski)
- Add new CPU IDs for CometLake Mobile and Desktop to the Intel RAPL
power capping driver (Zhang Rui)
- Allow device initialization in the generic power domains (genpd)
framework to be more straightforward and clean it up (Ulf Hansson)
- Add support for adjusting OPP voltages at run time to the OPP
framework (Stephen Boyd)
- Avoid freeing memory that has never been allocated in the
hibernation core (Andy Whitcroft)
- Clean up function headers in a header file and coding style in the
wakeup IRQs handling code (Ulf Hansson, Xiaofei Tan)
- Clean up the SmartReflex adaptive voltage scaling (AVS) driver for
ARM (Ben Dooks, Geert Uytterhoeven)
- Wrap power management documentation to fit in 80 columns (Bjorn
Helgaas)
- Add pm-graph utility entry to MAINTAINERS (Todd Brandt)
- Update the cpupower utility:
* Fix the handling of set and info subcommands (Abhishek Goel)
* Fix build warnings (Nathan Chancellor)
* Improve mperf_monitor handling (Janakarajan Natarajan)"
* tag 'pm-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (83 commits)
PM: Wrap documentation to fit in 80 columns
cpuidle: Pass exit latency limit to cpuidle_use_deepest_state()
cpuidle: Allow idle injection to apply exit latency limit
cpuidle: Introduce cpuidle_driver_state_disabled() for driver quirks
cpuidle: teo: Avoid code duplication in conditionals
cpufreq: Register drivers only after CPU devices have been registered
cpuidle: teo: Avoid using "early hits" incorrectly
cpuidle: teo: Exclude cpuidle overhead from computations
PM / Domains: Convert to dev_to_genpd_safe() in genpd_syscore_switch()
mmc: tmio: Avoid boilerplate code in ->runtime_suspend()
PM / Domains: Implement the ->start() callback for genpd
PM / Domains: Introduce dev_pm_domain_start()
ARM: OMAP2+: SmartReflex: add omap_sr_pdata definition
PM / wakeirq: remove unnecessary parentheses
power: avs: smartreflex: Remove superfluous cast in debugfs_create_file() call
cpuidle: Use nanoseconds as the unit of time
PM / OPP: Support adjusting OPP voltages at runtime
PM / core: Clean up some function headers in power.h
cpufreq: Add NULL checks to show() and store() methods of cpufreq
cpufreq: intel_pstate: Fix plain int as pointer warning from sparse
...
Pull regulator updates from Mark Brown:
"Another fairly quiet release for the regulator API, some work all
around including some core work but mostly in specialist or driver
specific code:
- Fix for powering off boot-on regulators
- Enhancements to the coupled regulator support introduced in the
last release
- Conversion of a bunch of drivers to the fwnode API for GPIOs
- Mode support for DA9062
- New device support for Qualcomm PM1650, PM8004 and PM895 and
Silergy SR83X
- Removal of obsolete AB8505 support"
* tag 'regulator-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (49 commits)
regulator: da9062: Return REGULATOR_MODE_INVALID for invalid mode
regulator: Fix Kconfig indentation
regulator: tps6105x: add optional devicetree support
tps6105x: add optional devicetree support
regulator: rn5t618: fix rc5t619 ldo10 enable
regulator: vexpress: Use PTR_ERR_OR_ZERO() to simplify code
dt-bindings: mfd: da9062: describe buck modes
regulator: da9062: add of_map_mode support for bucks
regulator: da9062: refactor buck modes into header
regulator: stpmic1: Set a default ramp delay value
regulator: core: Let boot-on regulators be powered off
regulator: core: Don't try to remove device links if add failed
regulator: ab8500: Remove SYSCLKREQ from enum ab8505_regulator_id
regulator: ab8500: Remove AB8505 USB regulator
regulator: fan53555: add chip id for Silergy SYR83X
regulator: fixed: add off-on-delay
dt-bindings: regulator: fixed: add off-on-delay-us property
regulator: core: Allow generic coupling only for always-on regulators
regulator: core: Release coupled_rdevs on regulator_init_coupling() error
regulator: bd70528: Add MODULE_ALIAS to allow module auto loading
...
In order to allow the display driver to deal uniformly with all SOR
generations, implement the SOR clocks in a way that is compatible with
Tegra186 and later.
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Later SoC generations implement this clock as SOR1_OUT. For consistency,
the Tegra210 implementation was adapted to match the same name in commit
4d1dc40185 ("dt-bindings: clock: tegra: Add sor1_out clock").
Clean up the remaining pieces by adopting the new name for the internal
identifiers and remove the old alias. Note that since both SOR1_SRC and
SOR1_OUT were referring to the same device tree clock ID, this does not
break device tree ABI.
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
ASPEED device tree updates for 5.5
- Lots of work on the AST2600 boards as bringup continues. There's the
eval board, and two IBM boards called Tacoma and Rainier
- A new flash layout for OpenBMC systems with larger flashes
- Better support for the MAC clocking when talking to a NCSI device,
making Linux less reliant on u-boot having done the correct thing
- LED fixes for vesin and fp5280g2
- SGPIO support
- Facebook network BMC cleanup with the common hardware moved to a
shared dtsi
* tag 'aspeed-5.5-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: (48 commits)
ARM: dts: aspeed-g6: Add timer description
ARM: dts: aspeed: ast2600evb: Enable i2c buses
ARM: dts: aspeed-g5: Add SGPIO description
ARM: dts: aspeed: yamp: Use common dtsi
ARM: dts: aspeed: minipack: Use common dtsi
ARM: dts: aspeed: cmm: Use common dtsi
ARM: dts: aspeed: Common dtsi for Facebook AST2500 Network BMCs
ARM: dts: aspeed: rainier: gpio-keys for PSU presence
ARM: dts: aspeed: rainier: Fix i2c eeprom size
ARM: dts: tacoma: Hog LPC pinmux
ARM: dts: aspeed: rainier: Enable VUART1
ARM: dts: aspeed: rainier: Add i2c eeproms
ARM: dts: aspeed: tacoma: Use 64MB for firmware memory
ARM: dts: aspeed: tacoma: Add host FSI description
ARM: dts: ast2600evb: Enable UART workaround
ARM: dts: aspeed: tacoma: Add UART1 and workaround
ARM: dts: aspeed-g6: Add remaining UARTs
ARM: dts: aspeed-g6: Fix i2c clock source
ARM: dts: aspeed: Add RCLK to MAC clocks for RMII interfaces
ARM: dts: aspeed: tacoma: Enable FMC and SPI devices
...
Link: https://lore.kernel.org/r/CACPK8Xe8XiJ+oEp3_AXO5Mox-mXWVrOJKQLJMKJxg1WdYCTzMw@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the Q6SSTOP clock control used on qcs404
based devices. This would allow wcss remoteproc driver to
control the required WCSS Q6SSTOP clock/reset controls to
bring the subsystem out of reset and shutdown the WCSS Q6DSP.
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Link: https://lkml.kernel.org/r/20191011132928.9388-3-govinds@codeaurora.org
[sboyd@kernel.org: Sort makefile]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This patch add support of a new feature which can be used in DT:
Performance Monitoring Unit with defined event data type.
In this patch the event data types are defined for Exynos PPMU.
The patch also updates the MAINTAINERS file accordingly and
adds the header file to devfreq event subsystem.
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
dt-bindings: Changes for v5.5-rc1
This contains various updates to device tree bindings and includes that
are related to driver changes in other Tegra branches.
* tag 'tegra-for-5.5-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: memory: Add binding for NVIDIA Tegra30 External Memory Controller
dt-bindings: memory: Add binding for NVIDIA Tegra30 Memory Controller
dt-bindings: memory: tegra30: Convert to Tegra124 YAML
dt-bindings: regulator: Document regulators coupling of NVIDIA Tegra20/30 SoCs
dt-bindings: clock: tegra: Rename SOR0_LVDS to SOR0_OUT
Link: https://lore.kernel.org/r/20191102144521.3863321-1-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Renesas ARM64 DT updates for v5.5 (take two)
- Video-Input and Serial-ATA support on RZ/G2N,
- Color Management Module support on various R-Car Gen3 SoCs,
- Initial support for the R-Car M3-W+ (r8a77961) SoC on the
Salvator-XS board.
* tag 'renesas-arm64-dt-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+
arm64: dts: renesas: Add Renesas R8A77961 SoC support
arm64: dts: renesas: Prepare for rename of ARCH_R8A7796 to ARCH_R8A77960
dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
dt-bindings: power: Add r8a77961 SYSC power domain definitions
arm64: dts: renesas: r8a774b1: Add SATA controller node
arm64: dts: renesas: rcar-gen3: Add CMM units
arm64: dts: renesas: r8a774b1: Add VIN and CSI-2 support
Link: https://lore.kernel.org/r/20191101155842.31467-5-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
Realtek ARM64 based SoC DT for v5.5
Add RTD1293 and RTD1296 DTs. Add the watchdog for all of RTD129x DTs.
Add reset controllers for RTD129x and start using them for UARTs.
* tag 'realtek-arm64-dt-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek:
arm64: dts: realtek: Add RTD129x UART resets
arm64: dts: realtek: Add RTD129x reset controller nodes
dt-bindings: reset: Add Realtek RTD1295
arm64: dts: realtek: Add watchdog node for RTD129x
arm64: dts: realtek: Add oscillator for RTD129x
arm64: dts: realtek: Add RTD1296 and Synology DS418
dt-bindings: arm: realtek: Document RTD1296 and Synology DS418
arm64: dts: realtek: Add RTD1293 and Synology DS418j
arm64: dts: realtek: Change dual-license from MIT to BSD
dt-bindings: arm: realtek: Document RTD1293 and Synology DS418j
dt-bindings: arm: realtek: Tidy up conversion to json-schema
Link: https://lore.kernel.org/r/20191030041000.31848-2-afaerber@suse.de
Signed-off-by: Olof Johansson <olof@lixom.net>
Renesas R-Car M3-W+ DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car M3-W+
(R8A77961) SoC, shared by driver and DT source files.
Renesas R-Car M3-W+ DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car M3-W+
(R8A77961) SoC, shared by driver and DT source files.
Renesas R-Car M3-W+ DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car M3-W+
(R8A77961) SoC, shared by driver and DT source files.
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
M3-W+ (R8A77961) SoC, as listed in Table 8.2b ("List of Clocks [R-Car
M3-W/R-Car M3-W+]") of the R-Car Series, 3rd Generation Hardware User's
Manual (Rev. 2.00, Jul. 31, 2019). A gap is added for CSIREF, to
preserve compatibility with the definitions for R-Car M3-W (R8A77960).
Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and POST2)
are not included, as they are used as internal clock sources only, and
never referenced from DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20191023122941.12342-3-geert+renesas@glider.be
The AST2600 has an explicit gate for the RMII RCLK for each of the four
MACs.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The AST2500 has an explicit gate for the RMII RCLK for each of the two
MACs.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
OMAP5 device contains an IVA subsystem (Image and Video Accelerator.)
IVA subsystem clkctrl definitions are currently missing, so add them.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tegra186 and later call this clock SOR0_OUT. Rename it on Tegra124 and
Tegra210 to make the names consistent.
Keep the old name for now to keep device trees buildable until they have
all been converted.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a header with symbolic reset indices for Realtek RTD1295 SoC.
Naming was derived from reset-names in an OEM's Device Tree.
Acked-by: Rob Herring <robh@kernel.org>
[AF: Dropped RTD1295 specific binding definition, updated SPDX]
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reset controller updates for v5.5
This tag adds support for Meson SM1 ARB resets, Uniphier Pro5 USB3
resets, the Meson-A1 reset controller, SocFPGA Agilex resets, and
Realtek RTD1195/RTD1295 resets.
It adds some reset controller API keywords for get_maintainers.pl and
makes a few remaining reset_control_ops const. Also included are
a conversion of the Qualcomm device tree bindings to yaml and a few
small kerneldoc improvements.
* tag 'reset-for-v5.5' of git://git.pengutronix.de/git/pza/linux:
reset: document (devm_)reset_control_get_optional variants
reset: improve of_xlate documentation
reset: simple: Add Realtek RTD1195/RTD1295
reset: simple: Keep alphabetical order
MAINTAINERS: add reset controller framework keywords
reset: zynqmp: Make reset_control_ops const
reset: hisilicon: hi3660: Make reset_control_ops const
reset: build simple reset controller driver for Agilex
reset: add support for the Meson-A1 SoC Reset Controller
dt-bindings: reset: add bindings for the Meson-A1 SoC Reset Controller
reset: uniphier-glue: Add Pro5 USB3 support
dt-bindings: reset: pdc: Convert PDC Global bindings to yaml
dt-bindings: reset: aoss: Convert AOSS reset bindings to yaml
reset: Remove copy'n'paste redundancy in the comments
reset: meson-audio-arb: add sm1 support
reset: dt-bindings: meson: update arb bindings for sm1
Link: https://lore.kernel.org/r/ede6874508472d0917dca770ef80b90626b0f205.camel@pengutronix.de
Signed-off-by: Olof Johansson <olof@lixom.net>
The mipi pll clock comes from the MIPI PHY PLL output, so
it should not be a fixed clock.
MIPI PHY PLL is in the MIPI DSI space, and it is used as
the bit clock for transferring the pixel data out and its
output clock is configured according to the display mode.
So it should be used only for MIPI DSI and not be exported
out for other usages.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
