Ken Wang
d5de797ff1
drm/amdgpu: fix vega10 graphic hang issue in S3 test
...
mmVGT_INDEX_TYPE has no default value, need to make sure
it's initialized when gfx is initialized.
Signed-off-by: Ken Wang <Ken.Wang@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-08-18 12:02:11 -04:00
Alex Deucher
67fb56a6dd
drm/amdgpu/gfx9: move define to header file
...
rather than defining it locally.
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:29 -04:00
Monk Liu
d951eeddfa
drm/amdgpu:new PM4 entry for VI/AI
...
TMZ package will be used for VULKAN/CHAINED-IB MCBP
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:26 -04:00
Alex Deucher
495a746354
drm/amdgpu: add KIQ packet defines to soc15d.h
...
Will be used in subsequent commits rather rather than
magic numbers.
Reviewed-by: monk liu <monk.liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:14 -04:00
Monk Liu
9ccd52eb24
drm/amdgpu:enable mcbp for gfx9(v2)
...
set bit 21 of IB.control filed to actually enable
MCBP for SRIOV
v2:
add flag for preemption enable bit for soc15 and use
this flag instead of hardcode.
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:35 -04:00
Xiangliang Yu
464826d67a
drm/amdgpu: init kiq and kcq for vega10
...
Init kiq via cpu mmio and init kcq through kiq.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:00 -04:00
Ken Wang
8e3153ba3f
drm/amdgpu: add common soc15 headers
...
These are used by various IP modules.
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:31 -04:00
