Commit Graph

14536 Commits

Author SHA1 Message Date
Chris Brandt
4cb674cd20 ARM: dts: rskrza1: Add Ethernet pin group
Add pin configuration for Ethernet.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-31 17:10:04 +02:00
Chris Brandt
cde2380548 ARM: dts: rskrza1: Add SCIF2 pin group
Add pin configuration for SCIF2 serial console interface.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-31 17:10:00 +02:00
Jacopo Mondi
6f9a9720b0 ARM: dts: genmai: Add ethernet pin group
Add pin configuration subnode for ETHER ethernet controller.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-31 17:09:56 +02:00
Jacopo Mondi
55ec65552d ARM: dts: genmai: Add user led device nodes
Add device nodes for user leds on Genmai board.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-31 17:09:53 +02:00
Jacopo Mondi
2d164e690f ARM: dts: genmai: Add RIIC2 pin group
Add pin configuration subnode for RIIC2 interface.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-31 17:09:49 +02:00
Jacopo Mondi
177f8744b9 ARM: dts: genmai: Add SCIF2 pin group
Add pin configuration subnode for SCIF2 serial debug interface.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-31 17:09:45 +02:00
Jacopo Mondi
0d69caa698 ARM: dts: r7s72100: Add pin controller node
Add pin controller node with 12 gpio controller sub-nodes to
r7s72100 dtsi.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-31 17:09:40 +02:00
Paul Kocialkowski
2c85e517b1 ARM: tegra: Register host1x node with IOMMU binding on Tegra124
This registers the host1x node with the SMMU (as HC swgroup) to allow
the host1x code to attach to it. It avoid failing the probe sequence,
which resulted in the Tegra DRM driver not probing and thus nothing
being displayed on-screen.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-07-31 16:42:57 +02:00
Sean Wang
63edf12807 arm: dts: mt7623: add clock-frequency to CPU nodes
Add clock-frequency property to CPU nodes. Avoids warnings like
[    0.001568] /cpus/cpu@0 missing clock-frequency property
[    0.001588] /cpus/cpu@1 missing clock-frequency property
[    0.001601] /cpus/cpu@2 missing clock-frequency property
[    0.001614] /cpus/cpu@3 missing clock-frequency property
at boot time

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-07-31 13:31:32 +02:00
Sean Wang
f4ff257cd1 arm: dts: mt7623: add support for Bananapi R2 (BPI-R2) board
Add support for the Bananapi R2 (BPI-R2) development board from
BIPAI KEJI. Detailed hardware information for BPI-R2 which could be
found on http://www.banana-pi.org/r2.html

The patch added nodes into the SoC-level file mt7623.dtsi such as CPU OPP
table and thermal zone treating CPU as one of cooling devices and also
added nodes into board-level file mt7623n-bananapi-bpi-r2.dts such as
MediaTek GMAC, MT7530 Switch, the crypto engine, USB, IR, I2S, I2C, UART,
SPI, PWM, GPIO keys, GPIO LEDs and PMIC LEDs. As to the other missing
hardware and peripherals, they would be added and integrated continuously.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-07-31 13:31:31 +02:00
John Crispin
876680cf23 arm: dts: mt7623: enable the nand device on the mt7623n nand rfb
Enable the nand device and setup pinmux on the mt7632m rfb with nand
support.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-07-31 13:31:30 +02:00
John Crispin
59c03de0e1 arm: dts: mt7623: enable the usb device on the mt7623n rfb
All versions of the mt7623n RFB have an USB port so enable the device.
There is a gpio that gets used to power up the port supply. Add support
for this gpio using the fixed-regulator driver.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-07-31 13:31:30 +02:00
John Crispin
d3d0b996a7 arm: dts: mt7623: cleanup the mt7623n rfb uart nodes
This patch does a cleanup of the uart nodes in the dts file of the RFB. It
adds aliases, enables 2 more uarts and explicitly sets the uart mode of the
console.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-07-31 13:31:29 +02:00
Sean Wang
5fd1f96c8c arm: dts: mt7623: rename mt7623-evb.dts to arch/arm/boot/dts/mt7623n-rfb.dtsi
There are 2 versions of the MT7623 SoC, the one is MT7623N and the other
is MT7623A.  MT7623N is almost identical to MT7623A but has some
additional multimedia features. The reference boards are available as
NAND or MMC and might have a different ethernet setup. In order to reduce
the duplication of devicetree code we add an intermediate dtsi file for
these reference boards. Additionally MediaTek pointed out, that the EVB
is yet another board and the board in question is infact the RFB. Take
this into account while renaming the files.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-07-31 13:31:28 +02:00
John Crispin
c5749d3488 arm: dts: mt7623: add mt6323.dtsi file
MediaTek produces various PMICs. Which one is used depends on the actual
circuit design. Instead of adding the correct PMIC node to every dts file
we instead add a new intermediate dtsi file which adds the PMIC node. For
those boards with the same PMIC, the intermediate mt6323.dtsi could be
reused to save more redundant nodes created on each board device-tree
files.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-07-31 13:31:28 +02:00
Sam Nelson
93c1fc3b67 ARM: dts: keystone-k2e-evm: Add and enable DSP CMA memory pool
A CMA memory pool reserved memory node is added, and is attached to
the DSP node through the 'memory-region' property on the K2E EVM board.
This area will be used for allocating virtio rings and buffers. This
node allows the DSP Memory Protection and Address Extension (MPAX)
module to be configured properly for the DSP processor, and matches
the values used on the other Keystone 2 boards for software
compatibility.

The reserved memory node and the user DSP node are also marked okay
to enable the DSP on the 66AK2E EVM board.

Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-30 20:50:06 -07:00
Sam Nelson
99663d4ef3 ARM: dts: keystone-k2l-evm: Add and enable common DSP CMA memory pool
A common CMA memory pool reserved memory node is added, and is attached
to all the DSP nodes through the 'memory-region' property on the 66AK2L
EVM board. This area will be used for allocating virtio rings and buffers.
The common node allows the DSP Memory Protection and Address Extension
(MPAX) module to be configured uniformly across all the DSP processors.

The reserved memory node and all the user DSP nodes are also marked okay
to enable the DSPs on the 66AK2L EVM board.

Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-30 20:50:06 -07:00
Sam Nelson
620eb21060 ARM: dts: keystone-k2hk-evm: Add and enable common DSP CMA memory pool
A common CMA memory pool reserved memory node is added, and is attached
to all the DSP nodes through the 'memory-region' property on the 66AK2H
EVM board. This area will be used for allocating virtio rings and buffers.
The common node allows the DSP Memory Protection and Address Extension
(MPAX) module to be configured uniformly across all the DSP processors.

The reserved memory node and all the user DSP nodes are also marked okay
to enable the DSPs on the 66AK2K EVM board.

Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-30 20:50:05 -07:00
Suman Anna
7d856409db ARM: dts: keystone-k2e: Add DSP node
The Keystone 2 66AK2E SoC has one TMS320C66x DSP Core Subsystem
(C66x CorePac), with a 1.4 GHz C66x Fixed or Floating-Point DSP
Core, and 32 KB of L1P & L1D SRAMs and a 1 MB L2 SRAM. Add the
DT node for this DSP processor sub-system. The processor does
not have a MMU, and uses various IPC Generation registers and
shared memory for inter-processor communication. The alias with
a stem 'rproc' has also been added for the DSP, it provides a
fixed remoteproc id for the DSP processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-30 20:50:05 -07:00
Suman Anna
a6f0102bb6 ARM: dts: keystone-k2l: Add DSP nodes
The Keystone 2 66AK2L SoCs have 4 TMS320C66x DSP Core Subsystems
(C66x CorePacs), each with a 1.0 GHz or 1.2 GHz C66x Fixed /
Floating-Point DSP Core, and 32 KB of L1P & L1D SRAMs and a 1 MB
L2 SRAM. Add the DT nodes for these DSP processor sub-systems.
The processors do not have an MMU, and use various IPC Generation
registers and shared memory for inter-processor communication.
The aliases with a stem 'rproc' have also been added for all the
DSPs, they provide a fixed remoteproc id to each DSP processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-30 20:50:05 -07:00
Suman Anna
877ad77f9a ARM: dts: keystone-k2hk: Add DSP nodes
The Keystone 2 66AK2H/66AK2K SoCs have upto 8 TMS320C66x DSP Core
Subsystems (C66x CorePacs), each with a 1.0 GHz or 1.2 GHz C66x
Fixed/Floating-Point DSP Core, and 32 KB of L1P & L1D SRAMs and a
1 MB L2 SRAM. Add the DT nodes for these DSP processor sub-systems.
The processors do not have an MMU, and use various IPC Generation
registers and shared memory for inter-processor communication.
The aliases with a stem 'rproc' have also been added for all the
DSPs, they provide a fixed remoteproc id to each DSP processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-30 20:50:05 -07:00
Eric Anholt
3bfe25fa9f ARM: dts: bcm283x: Move the BCM2837 DT contents from arm64 to arm.
BCM2837 is somewhat unusual in that we build its DT on both arm32 and
arm64.  Most devices are being run in arm32 mode.

Having the body of the DT for 2837 separate from 2835/6 has been a
source of pain, as we often need to make changes that span both
directories simultaneously (for example, the thermal changes for 4.13,
or anything that changes the name of a node referenced by '&' from
board files).  Other changes are made more complicated than they need
to be, such as the SDHOST enabling, because we have to split a single
logical change into a 283[56] half and a 2837 half.

To fix this, make the stub board include file live in arm64 instead of
arm32, and keep all of BCM283x's contents in arm32.  From here on, our
changes to DT contents can be submitted through a single tree.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-07-28 16:54:15 -07:00
Martin Blumenstingl
40b5c4f30c ARM: dts: meson: add a node which describes the SRAM
All 32bit Meson SoCs contain 128KiB SRAM. This SRAM is used when
suspending the device (the the ARM Power Firmware on
Meson8/Meson8b/Meson8m2 saves the DDR settings there) and to boot the
secondary CPU cores.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-07-28 09:47:27 -07:00
Martin Blumenstingl
2eca2a161a ARM: dts: meson8b: use the existing wdt node to override the compatible
Meson8b has to define it's own compatible string for the watchdog. This
patch removes the duplicate resource (register region and interrupt)
definition from meson8b.dtsi and simply re-uses these values from
meson.dtsi (as the register offset, size and interrupt are identical).

This is purely cosmetic and does not change any functionality.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-07-28 09:47:09 -07:00
Martin Blumenstingl
43d91c587f ARM: dts: meson8: add the PWM controller nodes
pwm_ab and pwm_cd are already inherited from meson.dtsi, we only need to
define the correct "compatible" string so the pwm-meson driver can
choose the parent clocks correctly.
pwm_ef is added to meson8.dtsi directly (similar to how it's done in
meson8b.dtsi) as this controller only exists on Meson8 and Meson8b.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-07-28 09:42:11 -07:00
Martin Blumenstingl
440bdcdbfa ARM: dts: move the pwm_ab and pwm_cd nodes to meson.dtsi
According to the vendor kernel sources these also exist (at the same
address) on Meson6 and Meson8. This can be found by running
$ grep -R "define PWM_PWM_[A-D]" arch/arm/
in the Amlogic GPL kernel tree (arm-src-kernel-2015-01-15-321cfb5a46).
pwm_ef does not seem to exist on older SoCs, so we keep it in
meson8b.dtsi for now.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-07-28 09:42:11 -07:00
Pierre-Yves MORDRET
01d281b6e4 ARM: dts: stm32: Add DMA support for STM32H743 SoC
This patch adds DMA support for STM32H743 SoC.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-07-28 09:51:23 +02:00
Pierre-Yves MORDRET
47c8a5035b ARM: dts: stm32: Add DMA support for STM32F746 SoC
This patch adds DMA support for STM32F746 SoC.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-07-28 09:37:23 +02:00
Rob Herring
5911fc65f6 ARM: dts: exynos: fix PCI bus dtc warnings
dtc recently added PCI bus checks. Fix these warnings.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-07-28 07:49:14 +02:00
Chris Paterson
a03633abae ARM: dts: iwg20m: Add MMCIF0 support
Define the iwg20m board dependent part of the MMCIF0 device node.

Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 17:39:18 +02:00
Simon Horman
a3fbb1dc13 ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for vin nodes
Use R-Car Gen 2 fallback binding for vind nodes in DT for r8a7794 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7794 and the
fallback binding for R-Car Gen 2

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-27 17:39:13 +02:00
Simon Horman
b5595f2ffe ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for vin nodes
Use R-Car Gen 2 fallback binding for vind nodes in DT for r8a7791 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7791 and the
fallback binding for R-Car Gen 2

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-27 17:39:07 +02:00
Simon Horman
a94b9e569c ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for vin nodes
Use R-Car Gen 2 fallback binding for vind nodes in DT for r8a7790 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7790 and the
fallback binding for R-Car Gen 2

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-27 17:38:58 +02:00
Chris Paterson
873038ddc3 ARM: dts: r8a7743: Add MMCIF0 support
Add the MMCIF0 device to the r8a7743 device tree.

Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:39 +02:00
Geert Uytterhoeven
18951ad1dc ARM: dts: r8a7794: Reserve SRAM for the SMP jump stub
Reserve SRAM for the jump stub for CPU core bringup.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:38 +02:00
Geert Uytterhoeven
cbbf5d6cd1 ARM: dts: r8a7793: Reserve SRAM for the SMP jump stub
Reserve SRAM for the jump stub for CPU core bringup.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:38 +02:00
Geert Uytterhoeven
a81597bff9 ARM: dts: r8a7792: Reserve SRAM for the SMP jump stub
Reserve SRAM for the jump stub for CPU core bringup.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:38 +02:00
Geert Uytterhoeven
d7ff938254 ARM: dts: r8a7791: Reserve SRAM for the SMP jump stub
Reserve SRAM for the jump stub for CPU core bringup.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:38 +02:00
Geert Uytterhoeven
e66938697e ARM: dts: r8a7790: Reserve SRAM for the SMP jump stub
Reserve SRAM for the jump stub for CPU core bringup.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:37 +02:00
Geert Uytterhoeven
d2791b1c8f ARM: dts: r8a7745: Reserve SRAM for the SMP jump stub
Reserve SRAM for the jump stub for CPU core bringup.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:37 +02:00
Geert Uytterhoeven
857892bfc5 ARM: dts: r8a7743: Reserve SRAM for the SMP jump stub
Reserve SRAM for the jump stub for CPU core bringup.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:37 +02:00
Geert Uytterhoeven
709f8d2622 ARM: dts: r8a7794: Add Inter Connect RAM
R-Car E2 has 2 regions of Inter Connect RAM (72 + 4 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:36 +02:00
Geert Uytterhoeven
89d534d96a ARM: dts: r8a7793: Add Inter Connect RAM
R-Car M2-N has 2 regions of Inter Connect RAM (72 + 4 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:36 +02:00
Geert Uytterhoeven
e63a6a48fa ARM: dts: r8a7792: Add Inter Connect RAM
R-Car V2H has 2 regions of Inter Connect RAM (72 + 4 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:35 +02:00
Geert Uytterhoeven
5ccce438b9 ARM: dts: r8a7791: Add Inter Connect RAM
R-Car M2-W has 2 regions of Inter Connect RAM (72 + 4 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:35 +02:00
Geert Uytterhoeven
c90715a3ba ARM: dts: r8a7790: Add Inter Connect RAM
R-Car H2 has 2 regions of Inter Connect RAM (72 + 4 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:35 +02:00
Geert Uytterhoeven
825216b816 ARM: dts: r8a7745: Add Inter Connect RAM
RZ/G1E has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:34 +02:00
Geert Uytterhoeven
06278baa1b ARM: dts: r8a7743: Add Inter Connect RAM
RZ/G1M has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:34 +02:00
Biju Das
9e70afe39e ARM: dts: iwg20d-q7: Add Ethernet AVB support
Define the iWave RainboW-G20D-Qseven board dependent part of the Ethernet
AVB device node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:34 +02:00
Biju Das
278a1df198 ARM: dts: r8a7743: Add Ethernet AVB support
Add Ethernet AVB support for r8a7743 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:33 +02:00