Don't cast to long pointers blindly just for using find_first_bit()
and co. This is certainly not portable at all.
Reimplement the code with ffs() and fls() instead. This is a slight
optimization, too.
Spotted by coverity CID 1056484 and 1056485.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
When using DT binding to pass private data, there would be Kernel panic
occuring due to NULL pointer access in wm8962_i2c_probe(). Thus fix it.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
regmap_register_patch fails without the MAX_REGISTER set to highest
register written to. Increase to register 0x47
Signed-off-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Moving platform data to bus probe and convert to regmap_update_bits.
This will work nicer when converted to device tree instead of having it
split into multiple probes
Signed-off-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds platform data support for a reset GPIO.
Also uses reset_gpio to toggle reset of the CODEC
Signed-off-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
ASoC: Updates for v3.13
- Further work on the dmaengine helpers, including support for
configuring the parameters for DMA by reading the capabilities of the
DMA controller which removes some guesswork and magic numbers fromm
drivers.
- A refresh of the documentation.
- Conversions of many drivers to direct regmap API usage in order to
allow the ASoC level register I/O code to be removed, this will
hopefully be completed by v3.14.
- Support for using async register I/O in DAPM, reducing the time taken
to implement power transitions on systems that support it.
Add device tree support to tpa6130a2 driver and document the
bindings.
Signed-off-by: Sebastian Reichel <sre@debian.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
The conversion of the si476x to regmap removed locking of the core during
register updates, allowing things like power state changes for the MFD to
happen during a register update. Avoid this by taking the core lock in the
DAI operations (which are the only things that do register updates) as we
used to do in the open coded register I/O functions.
Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
There is no need for the CODEC to go to standby on resume since the core will
power it up as needed and in any case it is an idle_bias_off CODEC so would
normally sit with bias off while idle.
Signed-off-by: Mark Brown <broonie@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
If we have control over the LDO then disable it during suspend; the device
is already being put into reset so will be non-functional over suspend
anyway and this will save a small amount of power.
Signed-off-by: Mark Brown <broonie@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
This is more idiomatic and is required for robust operation since we must
ensure that the clocking configuration is valid as rapidly as possible.
Signed-off-by: Mark Brown <broonie@linaro.org>
