The On Chip Peripherals (OCP) device node is a simplified
representation of the AM33XX SoC interconnect. An OCP dev
node is already defined in the am33xx.dtsi Device Tree
source file included by am33xx based boards so there is
no need to redefine this on each board DT file.
Also, the OCP and IP modules directly connected to it are SoC
internal details that is better to keep outside of board files.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
am33xx boards DTS include the am33xx.dtsi Device Tree
source file that already define a pinmux device node for
the AM33XX SoC Pin Multiplex.
Redefining this for each board makes the Device Tree files
harder to modify and maintain so let's just use what is
already defined in the included .dtsi file.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
This matches the vendor 3.8.x configuration that is shipping
with the boards.
The LED layout is now:
USR0: heartbeat
USR1: mmc0 (micro-SD slot)
USR2: cpu0
USR3: mmc1 (eMMC)
The cpu0 triggers was put in between the mmc triggers to make
is easier to see where the disk activity is.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Tested-by: Kevin Hilman <khilman@linaro.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
The pinmux is specified in am335x-bone-common.dtsi to be
reused by the eMMC cape.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Tested-by: Kevin Hilman <khilman@linaro.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
[bcousson@baylibre.com: Fix traling spaces and useless comments]
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Adds AM33XX MMC support for am335x-bone, am335x-evm and am335x-evmsk boards.
Also added is the DMA binding definitions based on the generic DMA request
binding.
Additional changes made to DTS:
* Interrupt, reg and compatible properties added
* ti,needs-special-hs-handling added
Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
This patch makes the Tegra RTC enabled as default for Tegra124 platform.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Keystone2 based SOCs supports 3 instances of SPI controllers. Add
the device nodes for them.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Keystone2 based SOCs supports 3 instances of i2c controllers. Add
the device nodes for them. The i2c0 child device AT24C1024 EEPROM node
is also added. When different board variants are added in future, it
can be moved to the supported boards from common SOC file.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
From Simon Horman:
Second Round of Renesas ARM based SoC updates for v3.13
* SMP support for r8a7791 SoC
* r8a7779_init_irq_extpin() for DT for r8a7779 and r8a7778 SoCs
* Add HPB-DMAC to r8a7779 and r8a7778 SoCs
* Add r7s72100 SoC
* Make use of ARCH timer workaround on r8a7791 SoC
* Add IRQC platform device support to r8a7791 SoC
* Add I2C clocks and aliases for the DT mode for r8a7790 SoC
* Add MAC platform device to r8a73a4 SoC
* tag 'renesas-soc2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791 SMP support
ARM: shmobile: r8a7779: split r8a7779_init_irq_extpin() for DT
ARM: shmobile: r8a7778: split r8a7778_init_irq_extpin() for DT
ARM: shmobile: r7s72100 SCIF support
ARM: shmobile: Initial r7s72100 SoC support
ARM: shmobile: r8a7791 Arch timer workaround
ARM: shmobile: r8a7791 IRQC platform device support
ARM: shmobile: Introduce r8a7791_add_standard_devices()
ARM: shmobile: Break out R-Car Gen2 setup code
ARM: shmobile: r8a73a4: add a clock alias for the DMAC in DT mode
ARM: shmobile: r8a7790: add I2C clocks and aliases for the DT mode
ARM: shmobile: r8a7779: add HPB-DMAC support
ARM: shmobile: r8a7778: add HPB-DMAC support
ARM: shmobile: r8a73a4: add a DMAC platform device and clock for it
ARM: shmobile: Remove #gpio-ranges-cells DT property
gpio: rcar: Remove #gpio-range-cells DT property usage
ARM: shmobile: armadillo: fixup ether pinctrl naming
ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup
ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The s2f_* clocks are called h2f_* in the datasheets.
Rename them accordingly in the socfpga.dtsi.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Some of the clock nodes and the rst-/sysmgr use wrong indentation.
Fix it.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
This adds basic support for the terasic SoCkit board.
The board includes an Altera Cyclone 5 SoC.
[Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
The current socfpga_cyclone5.dts describes the Altera Cyclone5 SoC Development
Kit. The Cyclone5 includes a SoCFPGA, which itself can be included in other
SoC+FPGA combinations.
Instead of having to describe all Cyclone5 common nodes in every board specific
dts, move socfpga_cyclone5.dts to a dtsi and include this in a new dts for the
Development Kit.
[Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
From Jason Cooper:
mvebu dt changes for v3.13 (round 2)
- kirkwood
- use MBus DT binding for setting up the windows
- move crypto and nand underneath the mbus node
- ib62x0 has a u-boot env partition
- mvebu
- add the Armada XP matrix board
* tag 'dt-3.13-2' of git://git.infradead.org/linux-mvebu:
arm: mvebu: add support for the Armada XP Matrix board
ARM: kirkwood: ib62x0: add u-boot environment partition
ARM: kirkwood: Move the nand node under the mbus node
ARM: kirkwood: Move the crypto node under the mbus node
ARM: kirkwood: Remove kirkwood_setup_wins and rely on the DT binding
Signed-off-by: Kevin Hilman <khilman@linaro.org>
From Jason Cooper:
mvebu dt changes for v3.13
- mvebu
- add MSI
- new compatible string for mv64xxx-i2c
- dove
- use the pre-processor
- define the MBus nodes
- add PCIe controllers
- add Globalscale D3Plug
- relocate internal registers nodes
* tag 'dt-3.13' of git://git.infradead.org/linux-mvebu:
ARM: dove: add initial DT file for Globalscale D3Plug
ARM: dove: add PCIe controllers to SoC DT
ARM: dove: relocate internal registers device nodes
ARM: dove: add MBus DT node
ARM: dove: add MBUS_ID macro to Dove DT
ARM: dove: use preprocessor on device tree files
ARM: mvebu: link PCIe controllers to the MSI controller
ARM: mvebu: the MPIC now provides MSI controller features
ARM: dts: mvebu: Update with the new compatible string for mv64xxx-i2c
Signed-off-by: Kevin Hilman <khilman@linaro.org>
As defined in the DT, clkout2 is not allowed to change the pll inside
si5351.
This patch extends the properties of clkout2 so that it works as the
external clock of the audio device in the Cubox.
Also, as the second si5351 clock is not used in the Cubox, its
definition is removed.
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch activates the audio device of the Cubox.
The audio flow (pin mpp_audio1) is output on both I2S and S/PDIF.
The third si5351 clock (#2, pin mpp13) is used as the external clock.
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Currently we get the following errors on imx51-babbage:
/display@di0: could not find display-timings node
/display@di0: no timings specified
/display@di1: could not find display-timings node
/display@di1: no timings specified
imx-drm imx-drm: failed to allocate buffer with size 0
Provide timing values for IPU1, which is connected to a DVI bridge and
to IPU2, which can be connected to the WVGA panel, so that both of them can
be functional.
While at it, disable the WVGA panel, so that DVI output becomes the default one.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add support for the Tegra124 based Venice2 reference board.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Initial support for Tegra 124 SoC. This is expected to be included in
the board DTS files.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Now since the clock tree is added, update UART dt nodes with clock data
and remove the hard coded clock frequency.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
The wake-up interrupt bit is available on omap3/4/5 processors
unlike what we claim. Without fixing it we cannot use it on
omap3 and the system configured for wake-up events will just
hang on wake-up.
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
SoC family definitions at the moment are reactive to board needs
as a result, beagle-xm would matchup with ti,omap3 which invokes
omap3430_init_early instead of omap3630_init_early. Obviously, this is
the wrong behavior.
With clock node dts conversion, we get the following warnings before
system hangs as a result and 3630 based platforms fails to boot
(uart4 clocks are only present in OMAP3630 and not present in
OMAP3430):
...
omap_hwmod: uart4: cannot clk_get main_clk uart4_fck
omap_hwmod: uart4: cannot _init_clocks
WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2434
_init+0x6c/0x80()
omap_hwmod: uart4: couldn't init clocks
...
WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2126
_enable+0x254/0x280()
omap_hwmod: timer12: enabled state can only be entered from
initialized, idle, or disabled state
...
WARNING: CPU: 0 PID: 46 at arch/arm/mach-omap2/omap_hwmod.c:2224
_idle+0xd4/0xf8()
omap_hwmod: timer12: idle state can only be entered from enabled state
WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2126
_enable+0x254/0x280()
omap_hwmod: uart4: enabled state can only be entered from
initialized, idle, or disabled state
So, add specific compatiblity for 3630 to allow match for Beagle-XM
platform.
Signed-off-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: left out ti,omap343x, updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Without this node, there will be no palmas driver to notify
dwc3 that a cable has been connected and, without that, dwc3
will never initialize.
Signed-off-by: Felipe Balbi <balbi@ti.com>
[kishon@ti.com: added dt properties for enabling vbus/id interrupts
and fixed vbus-supply value after SMPS10 is modeled as 2 regulators]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Use a common naming scheme "mode0name.modename flags" for the
USB host pins to be consistent.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
This adds devicetree for gta04 (Openmoko next generation board) with necessary
support for mmc, usb, leds and button.
Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Populate uarts, timers, rtc, wdt, gpio, i2c, spi, cpsw & pwm nodes.
Reason for adding these nodes early - hwmod code required address
space of peripherals corresponding to these nodes (as address space
details are removed from hwmod database).
uart0, timers - 1 & 2 and synctimer were already present, so here the
remaining uarts & timers are added.
All properties as per the existing binding has been added for uart,
timer, rtc, wdt & gpio. Even though that was not the current scope
of work, felt adding those would reduce or require no effort later
to get these peripherals working.
For i2c, spi, cpsw & pwm - only the properties that were sure to be
correct has been added (main intention is to make hwmod happy and
avoid any later modification to here added properties).
While at it add "ti,hwmod" property to already existing nodes.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Add minimal device tree source needed for DRA7 based SoCs.
Also add a board dts file for the dra7-evm (based on dra752)
which contains 1.5G of memory with 1G interleaved and 512MB
non-interleaved. Also added in the board file are pin configuration
details for i2c, mcspi and uart devices on board.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
The OMAP4 SoC family uses specially-designed PMIC (power management IC)
companion chip for power management needs: TWL6030/TWL6032.
Therefore there is a typical connection of PMIC to OMAP4 so we can
move it into separate .dtsi file and do not duplicate over
board-specific files.
Tested on OMAP4 SDP board and Pandaboard ES2.
Signed-off-by: Ruslan Bilovol <ruslan.bilovol@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
SMPS10 has two outputs OUT1 and OUT2. Hence SMPS10 is modeled as
two regulators. The DT node is split to reflect it.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Following commit ff5c9059 and therefore other omap platforms using
the gpio-omap driver correct the #interrupt-cells property on am33xx
too. The omap gpio binding documentaion also states that
the #interrupt-cells property should be 2.
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
ARM Performance Monitor Units are available on the am33xx,
add the support in the dtsi.
Tested with perf and oprofile on a regular beaglebone.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
