Commit Graph

258 Commits

Author SHA1 Message Date
Olof Johansson
fd46edb9f6 Merge tag 'renesas-clock2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.16" from
Simon Horman:

r8a7791 (R-Car M2) SoC
* Correct SYS-DMAC clock defines

r8a7740 (R-Mobile A1) SoC
* Correct name of DT Ethernet clock

* tag 'renesas-clock2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7791: Correct SYS-DMAC clock defines
  ARM: shmobile: r8a7740: Correct name of DT Ethernet clock

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19 23:29:24 -07:00
Sebastian Hesselbarth
d8c64c21b4 clk: berlin: add binding include for Berlin SoC clock ids
This adds a dt-binding include for Marvell Berlin BG2/BG2CD and BG2Q
core clock IDs.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2014-05-19 23:02:24 +02:00
Alim Akhtar
6520e968ee clk: exynos5420: Add 5800 specific clocks
Exynos5800 clock structure is mostly similar to 5420 with only
a small delta changes. So the 5420 clock file is re-used for
5800 also. The common clocks for both are seggreagated and few
clocks which are different for both are separately initialized.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-19 22:15:08 +09:00
Anson Huang
d551356890 ARM: imx: add clock driver for imx6sx
Add clock driver for i.MX6 SoloX SoC.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 15:35:19 +08:00
Mike Turquette
6ed8eb59e5 Merge tag 'clk-hisi-for-v3.16' of https://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux into clk-next-hisilicon
enable hix5hd2 clock
2014-05-14 23:16:32 -07:00
Tomasz Figa
2ce16c5342 clk: samsung: exynos3250: Add clocks using common clock framework
This patch add new the clock drvier of Exynos3250 SoC based on Cortex-A7
using common clock framework. The CMU (Clock Management Unit) of Exynos3250
control PLLs(Phase Locked Loops) and generate system clocks for CPU, buses,
and function clocks for individual IPs.

The CMU of Exynos3250 includes following clock doamins:
- CPU block for Cortex-A7 MPCore processor
- LEFTBUS/RIGHTBUS block
- TOP block for G3D/MFC/LCD0/ISP/CAM/FSYS/MFC/PERIL/PERIR

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Hyunhee Kim <hyunhee.kim@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Karol Wrona <k.wrona@samsung.com>
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
2014-05-14 19:41:32 +02:00
Shaik Ameer Basha
b31ca2a017 clk: samsung: exynos5420: add misc clocks
This patch adds some missing miscellaneous clocks specific
to exynos5420.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:23 +02:00
Shaik Ameer Basha
31116a642b clk: samsung: exynos5420: update clocks for MAU Block
This patch adds the missing MAU block specific clocks.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:23 +02:00
Shaik Ameer Basha
0a22c30653 clk: samsung: exynos5420: update clocks for PERIS and GEN blocks
This patch fixes some parent-child relationships according
to the latest datasheet and adds more clocks related to
PERIS and GEN blocks.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:20 +02:00
Shaik Ameer Basha
faec151b50 clk: samsung: exynos5420: update clocks for PERIC block
This patch includes,
    1] renaming of the HSI2C clocks
    2] renaming of spi clocks according to the datasheet
    3] fixes for child-parent relationships
    4] adding of more clocks related to PERIC block
    5] use GATE_IP_* offsets instead of GATE_BUS_*

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:20 +02:00
Shaik Ameer Basha
424b673a05 clk: samsung: exynos5420: update clocks for DISP1 block
This patch corrects some child-parent clock relationships,
and updates the clocks according to the latest datasheet.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:19 +02:00
Shaik Ameer Basha
3fac5941da clk: samsung: exynos5420: update clocks for G2D and G3D blocks
This patch adds missing clocks of G2D block. It also removes
the aclkg3d alias from G3D block clocks.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:19 +02:00
Shaik Ameer Basha
02932381ca clk: samsung: exynos5420: update clocks for GSCL and MSCL blocks
This patch adds the missing GSCL and MSCL block clocks
and corrects some wrong parent-child relationships.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:18 +02:00
Shaik Ameer Basha
3a767b35c6 clk: samsung: exynos5420: add clocks for ISP block
This patch adds minimum set of clocks to gate ISP block for
power saving.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:17 +02:00
Arun Kumar K
2ce262f456 clk: samsung: exynos5420: Add clock IDs needed by GPU
Adds IDs for the clocks needed by the ARM Mali GPU
in exynos5420.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:16 +02:00
Tomasz Stanislawski
a5b219b40c clk: samsung: exynos4: export sclk_hdmiphy clock
Export sclk_hdmiphy clock to be usable from DT.

Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:15 +02:00
Arun Kumar K
20b82ae27e clk: samsung: exynos5250: Add clocks for G3D
This patch adds the required clocks for ARM Mali IP
in Exynos5250.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
[t.figa: Changed clock ID to avoid conflict with CLK_SSS]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:15 +02:00
Sylwester Nawrocki
04bc7d96fb clk: samsung: exynos4: Use single clock ID for CLK_MDMA gate clocks
Exynos4210 and Exynos4x12 SoCs have the PL330 MDMA IP block clock
defined exactly in same way in documentation. Using different
names for these clocks is a bit misleading. Since there is no users
of CLK_MDMA2 in existing dts files this patch drops CLK_MDMA2 and
replaces it with CLK_MDMA in the driver. This ensures PL330 MDMA
has correct clock assigned on Exynos4x12 SoCs.

Suggested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:40:14 +02:00
Naveen Krishna Chatradhi
5b73721b60 clk: samsung: exynos5250/5420: Add gate clock for SSS module
This patch adds gating clock for SSS(Security SubSystem)
module on Exynos5250/5420.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
[t.figa: Fixed sort order and group name.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:23:26 +02:00
Rahul Sharma
5a989cf6a0 clk/exynos5260: add macros and documentation for exynos5260
Add macros which are used as Clock IDs in DT and clock file.
It also adds the documentation for the exynos5260 clocks.

Signed-off-by: Rahul Sharma <Rahul.Sharma@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-14 19:16:55 +02:00
Wolfram Sang
52eed4f5c2 ARM: shmobile: r7s72100: add spi clocks to dtsi
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-14 11:42:54 +09:00
Wolfram Sang
d165566b8d ARM: shmobile: r7s72100: add i2c clocks to dtsi
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-14 11:42:53 +09:00
Wolfram Sang
b6face404f ARM: shmobile: r7s72100: add essential clock nodes to dtsi
Only essential clocks are added for now. Other clocks will be added when
needed.

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-14 11:42:50 +09:00
Geert Uytterhoeven
a505daa501 ARM: shmobile: r8a7791: Correct SYS-DMAC clock defines
R-Car M2 has two MSTP bits for SYS-DMAC, not one.
Also bring the naming in sync with the documentation.

This issue was introduced in v3.14, in commit
4d8864c9e9 ("ARM: shmobile: r8a7791: Add
clock index macros for DT sources").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-13 10:16:42 +09:00
Heiko Stuebner
3f7c01ade2 clk: samsung: add clock controller driver for s3c2410, s3c2440 and s3c2442
This driver can handle the clock controllers of the socs mentioned above,
as they share a common clock tree with only small differences.

The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure.

As pll-rate-tables only the 12mhz variants are currently included.
The original code was wrongly checking for 169mhz xti values [a 0 to much
at the end], so the original 16mhz pll table would have never been
included and its values are so obscure that I have no possibility to
at least check their sane-ness. When using the formula from the manual
the resulting frequency is near the table value but still slightly off.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-13 08:00:40 +09:00
Zhangfei Gao
5efaf09021 clk: hisi: add clk-hix5hd2.c
Signed-off-by: Haifeng Yan <haifeng.yan@linaro.org>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-05-12 11:30:32 +08:00
Olof Johansson
7de24debea Merge tag 'renesas-dt-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v3.16" from Simon Horman:

r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs
* Add MSIOF nodes and aliases
* Correct I2C clock parents

r8a7791 (R-Car M2) SoC
* Add EHCI MSTP clock

r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards
* Add MSIOF nodes
* Add gpio-keys support for SW2
* Enable I2C
* Enable Quad SPI transfers for the SPI FLASH
* Rename and lable spi to qspi, add spi0 alias
* Set ethernet PHY LED mode

r8a7779 (R-Car H1) and r8a7778 (R-Car M2) SoCs
* Improve and correct HSPI nodes

r8a7778 (R-Car M2) based Bock-W board
* Add SPI FLASH

r8a7740 (R-Mobile A1) SoC
* Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings

r8a7740 (R-Mobile A1) based Armadillo800 EVA board
* Enable RTC
* Use KEY_* macros for gpio-keys

EMEV2 (Emma Mobile EV2) based kzm9g board
* Use KEY_* macros for gpio-keys

* tag 'renesas-dt-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits)
  ARM: shmobile: armadillo-reference dts: Seiko Instruments, Inc is "sii"
  ARM: shmobile: lager dts: Enable Quad SPI transfers for the SPI FLASH
  ARM: shmobile: koelsch dts: Enable Quad SPI transfers for the SPI FLASH
  ARM: shmobile: r8a7790: add IIC(B) cores to dtsi
  ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi
  ARM: shmobile: r8a7790: add IIC0-2 clock macros
  ARM: shmobile: r8a7791: Fix the I2C clocks parents in DT
  ARM: shmobile: r8a7790: Fix the I2C clocks parents in DT
  ARM: shmobile: lager: Correct setting of ethernet PHY LED mode
  ARM: shmobile: armadillo-reference dts: enable RTC
  ARM: shmobile: r8a7791: Add EHCI MSTP clock
  ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings
  ARM: shmobile: koelsch: activate i2c6 bus
  ARM: shmobile: koelsch: make i2c2-pfc node unique
  ARM: shmobile: r8a7791: add IIC(B) cores to dtsi
  ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi
  ARM: shmobile: r8a7791: add IIC0/1 clock macros
  ARM: shmobile: kzm9g-reference dts: Use KEY_* macros for gpio-keys
  ARM: shmobile: armadillo-reference dts: Use KEY_* macros for gpio-keys
  ARM: shmobile: koelsch: Set ethernet PHY LED mode
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-05 14:33:48 -07:00
Olof Johansson
e80c9c2c2d Merge branch 'renesas/clock' into next/boards
* renesas/clock:
  ARM: shmobile: r8a7790: remove old style audio clock
  ARM: shmobile: r8a7778: remove old style audio clock
  ARM: shmobile: r8a7791: Rename VSP1_SY clocks to VSP1_S
  ARM: shmobile: r8a7790: Rename VSP1_(SY|RT) clocks to VSP1_(S|R)
  ARM: shmobile: r8a7791: Fix the I2C clocks parents in legacy code
  ARM: shmobile: r8a7790: Fix the I2C clocks parents in legacy code
  ARM: shmobile: Introduce shmobile_clk_workaround()
  ARM: shmobile: r8a7791: Use rcar_gen2_read_mode_pins() helper
2014-05-05 14:14:24 -07:00
Olof Johansson
814789e2f1 Merge tag 'renesas-clock-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Renesas ARM Based SoC Clock Updates for v3.16" from Simon Horman:

SH Mobile shared clock code
* Introduce shmobile_clk_workaround()

r8a7791 (R-Car M2) SoC
* Rename VSP1_SY clocks to VSP1_S
* Correct the I2C clocks parents

r8a7790 (R-Car H2) SoC
* Remove old style audio clock
* Rename VSP1_(SY|RT) clocks to VSP1_(S|R)
* Fix the I2C clocks parents

r8a7778 (R-Car M1) SoC
* Remove old style audio clock

* tag 'renesas-clock-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7790: remove old style audio clock
  ARM: shmobile: r8a7778: remove old style audio clock
  ARM: shmobile: r8a7791: Rename VSP1_SY clocks to VSP1_S
  ARM: shmobile: r8a7790: Rename VSP1_(SY|RT) clocks to VSP1_(S|R)
  ARM: shmobile: r8a7791: Fix the I2C clocks parents in legacy code
  ARM: shmobile: r8a7790: Fix the I2C clocks parents in legacy code
  ARM: shmobile: Introduce shmobile_clk_workaround()
  ARM: shmobile: r8a7791: Use rcar_gen2_read_mode_pins() helper

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-05 13:51:15 -07:00
Kumar Gala
2c07e3c7dd clk: qcom: Various fixes for MSM8960's global clock controller
* Remove CE2_SLEEP_CLK, doesn't exist on 8960 family SoCs
* Fix incorrect offset for PMIC_SSBI2_RESET
* Fix typo:
	SIC_TIC -> SPS_TIC_H
	SFAB_ADM0_M2_A_CLK -> SFAB_ADM0_M2_H_CLK
* Fix naming convention:
	SFAB_CFPB_S_HCLK -> SFAB_CFPB_S_H_CLK
	SATA_SRC_CLK -> SATA_CLK_SRC

Signed-off-by: Kumar Gala <galak@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-04-30 11:54:16 -07:00
Alex Elder
7d3723ba8c clk: bcm21664: use common clock framework
Define the set of CCUs and provided clocks sufficient to satisfy the
needs of all the existing clock references for BCM21664.  Replace
the "fake" fixed-rate clocks used previously with "real" ones.

Note that only the minimal set of these clocks and CCUs is defined
here.  More clock definitions will need to be added as required by
the addition of additional drivers.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-04-30 11:51:44 -07:00
Alex Elder
0bdab78ba6 clk: bcm281xx: move compatible string definitions
The Broadcom 281xx clock code uses a #define for the compatible
string for it's clock control units (CCUs).  Rather than defining
those in the C source file, define them in the header file that's
shared by both the code and the device tree source file (along with
all the clock ids).

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-04-30 11:51:39 -07:00
Arnd Bergmann
12e8e59525 Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
3.15 fixes for AT91
- one little DT fix
- the use of proper directory for clock in include/dt-bindings
  it allows to remove the now empty include/dt-bindings/clk

* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
  dt-bindings: clock: Move at91.h to dt-bindigs/clock
  ARM: at91: fix spi cs on sama5d3 Xplained board

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-04-26 11:29:30 +02:00
Stephen Warren
9ef1af9ea2 dt: tegra: remove non-existent clock IDs
The Tegra124 clock DT binding currently provides 3 clocks that don't
actually exist; 2 for NAND and one for UART5/UARTE. Delete these. While
this is technically an incompatible DT ABI change, nothing could have
used these clock IDs for anything practical, since the HW doesn't exist.

Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-04-24 15:37:08 +02:00
Tushar Behera
35d35aae81 dt-bindings: clock: Move at91.h to dt-bindigs/clock
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
CC: Rob Landley <rob@landley.net>
CC: Andrew Victor <linux@maxim.org.za>
CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Acked-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
[nicolas.ferre@atmel.com: add new at91sam9261 & at91sam9rl]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-04-18 23:44:52 +02:00
Heiko Stuebner
ca2e90ac18 clk: samsung: add clock controller driver for s3c2412
This driver can handle the clock controller in the s3c2412 soc.

The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-04-15 02:11:36 +09:00
Heiko Stuebner
61fbb1d278 clk: samsung: add clock-driver for s3c2416, s3c2443 and s3c2450
The three SoCs share a common clock tree which only differs in the
existence of some special clocks.

As with all parts common to these three SoCs the driver is named
after the s3c2443, as it was the first SoC introducing this structure
and there exists no other label to describe this s3c24xx epoch.

The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure. As an example the sclk_uart gate was never handled previously
and the div_uart was made to be the clock used by the serial driver.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-04-15 02:11:08 +09:00
Wolfram Sang
01d968e905 ARM: shmobile: r8a7790: add IIC0-2 clock macros
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-14 11:31:18 +09:00
Magnus Damm
6225b99aa6 ARM: shmobile: r8a7791: Add EHCI MSTP clock
Add support for EHCI clock gating via the MSTP703 bit on r8a7791.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-14 11:31:16 +09:00
Wolfram Sang
c6e8f325e7 ARM: shmobile: r8a7791: add IIC0/1 clock macros
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-14 11:31:15 +09:00
Laurent Pinchart
58ea1d53ba ARM: shmobile: r8a7791: Rename VSP1_SY clocks to VSP1_S
The r8a7791 has three VSP1 instances, one of them being named VSPS (which
stands for "VSP Standard"). The clock section in the SoC datasheet
misunderstood the abbreviation as meaning VSP System, and named the
corresponding clock VSP1(SY). This mistake has been carried over to the
kernel code.

Fix this by renaming the VSP1_SY clock to VSP1_S.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-14 11:30:11 +09:00
Laurent Pinchart
79ea9934b8 ARM: shmobile: r8a7790: Rename VSP1_(SY|RT) clocks to VSP1_(S|R)
The r8a7790 has four VSP1 instances, two of them being named VSPS (which
stands for "VSP Standard") and VSPR (which stands for "VSP for
Resizing"). The clock section in the SoC datasheet misunderstood the
abbreviations as meaning VSP System and VSP Realtime, and named the
corresponding clocks VSP1(SY) and VSP1(RT). This mistake has been
carried over to the kernel code.

Fix this by renaming the VSP1_SY and VSP1_RT clocks to VSP1_S and VSP1_R.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-14 11:30:11 +09:00
Linus Torvalds
19bc2eec3c Merge tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/linux
Pull clock framework changes from Mike Turquette:
 "The clock framework changes for 3.15 look similar to past pull
  requests.  Mostly clock driver updates, more Device Tree support in
  the form of common functions useful across platforms and a handful of
  features and fixes to the framework core"

* tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/linux: (86 commits)
  clk: shmobile: fix setting paretn clock rate
  clk: shmobile: rcar-gen2: fix lb/sd0/sd1/sdh clock parent to pll1
  clk: Fix minor errors in of_clk_init() function comments
  clk: reverse default clk provider initialization order in of_clk_init()
  clk: sirf: update copyright years to 2014
  clk: mmp: try to use closer one when do round rate
  clk: mmp: fix the wrong calculation formula
  clk: mmp: fix wrong mask when calculate denominator
  clk: st: Adds quadfs clock binding
  clk: st: Adds clockgen-vcc and clockgen-mux clock binding
  clk: st: Adds clockgen clock binding
  clk: st: Adds divmux and prediv clock binding
  clk: st: Support for A9 MUX clocks
  clk: st: Support for ClockGenA9/DDR/GPU
  clk: st: Support for QUADFS inside ClockGenB/C/D/E/F
  clk: st: Support for VCC-mux and MUX clocks
  clk: st: Support for PLLs inside ClockGenA(s)
  clk: st: Support for DIVMUX and PreDiv Clocks
  clk: support hardware-specific debugfs entries
  clk: s2mps11: Use of_get_child_by_name
  ...
2014-04-05 18:39:18 -07:00
Linus Torvalds
2bf73dd61a Merge tag 'tags/cleanup2-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late cleanups from Arnd Bergmann:
 "These could not be part of the first cleanup branch, because they
  either came too late in the cycle, or they have dependencies on other
  branches.  Important changes are:

   - The integrator platform is almost multiplatform capable after some
     reorganization (Linus Walleij)
   - Minor cleanups on Zynq (Michal Simek)
   - Lots of changes for Exynos and other Samsung platforms, including
     further preparations for multiplatform support and the clocks
     bindings are rearranged"

* tag 'tags/cleanup2-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  devicetree: fix newly added exynos sata bindings
  ARM: EXYNOS: Fix compilation error in cpuidle.c
  ARM: S5P64X0: Explicitly include linux/serial_s3c.h in mach/pm-core.h
  ARM: EXYNOS: Remove hardware.h file
  ARM: SAMSUNG: Remove hardware.h inclusion
  ARM: S3C24XX: Remove invalid code from hardware.h
  dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock
  ARM: dts: Keep some essential LDOs enabled for arndale-octa board
  ARM: dts: Disable MDMA1 node for arndale-octa board
  ARM: S3C64XX: Fix build for implicit serial_s3c.h inclusion
  serial: s3c: Fix build of header without serial_core.h preinclusion
  ARM: EXYNOS: Allow wake-up using GIC interrupts
  ARM: EXYNOS: Stop using legacy Samsung PM code
  ARM: EXYNOS: Remove PM initcalls and useless indirection
  ARM: EXYNOS: Fix abuse of CONFIG_PM
  ARM: SAMSUNG: Move s3c_pm_check_* prototypes to plat/pm-common.h
  ARM: SAMSUNG: Move common save/restore helpers to separate file
  ARM: SAMSUNG: Move Samsung PM debug code into separate file
  ARM: SAMSUNG: Consolidate PM debug functions
  ARM: SAMSUNG: Use debug_ll_addr() to get UART base address
  ...
2014-04-05 15:46:37 -07:00
Linus Torvalds
cbda94e039 Merge tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver changes from Arnd Bergmann:
 "These changes are mostly for ARM specific device drivers that either
  don't have an upstream maintainer, or that had the maintainer ask us
  to pick up the changes to avoid conflicts.

  A large chunk of this are clock drivers (bcm281xx, exynos, versatile,
  shmobile), aside from that, reset controllers for STi as well as a
  large rework of the Marvell Orion/EBU watchdog driver are notable"

* tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
  Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac."
  Revert "net: stmmac: Add SOCFPGA glue driver"
  ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks
  ARM: STi: Add reset controller support to mach-sti Kconfig
  drivers: reset: stih416: add softreset controller
  drivers: reset: stih415: add softreset controller
  drivers: reset: Reset controller driver for STiH416
  drivers: reset: Reset controller driver for STiH415
  drivers: reset: STi SoC system configuration reset controller support
  dts: socfpga: Add sysmgr node so the gmac can use to reference
  dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
  reset: Add optional resets and stubs
  ARM: shmobile: r7s72100: fix bus clock calculation
  Power: Reset: Generalize qnap-poweroff to work on Synology devices.
  dts: socfpga: Update clock entry to support multiple parents
  ARM: socfpga: Update socfpga_defconfig
  dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
  net: stmmac: Add SOCFPGA glue driver
  watchdog: orion_wdt: Use %pa to print 'phys_addr_t'
  drivers: cci: Export CCI PMU revision
  ...
2014-04-05 15:37:40 -07:00
Tushar Behera
602408e3de dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-03-21 04:31:30 +09:00
Mike Turquette
7876114798 Merge tag 'clk-hisi' of https://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux into clk-next-hisilcon
updating clock drivers for Hisilicon
2014-03-19 12:54:03 -07:00
Haojian Zhuang
d3e6573c48 clk: hip04: add clock driver
Now only fixed rate clocks are appended into the clock driver.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-03-19 15:23:53 +08:00
Olof Johansson
6020dd9b01 Merge tag 'renesas-clock-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Renesas ARM Based SoC Clock Updates for v3.15" from Simon Horman:

* r7s72100 SoC (RZ/A1H)
  - Add clock for SH Ethernet
  - Add RSPI clocks

* r8a7791 (R-Car M2)
  - Add QSPI and SDHI clocks

* r8a7790 (R-Car H2)
  - Add audio clock
  - Remove legacy DT clocks
  - Correct SYS DMAC clock defines

* tag 'renesas-clock-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Remove legacy r8a7790 DT clocks
  ARM: shmobile: Add r8a7791 legacy SDHI clocks
  ARM: shmobile: r8a7790: Correct SYS DMAC clock defines
  ARM: shmobile: r7s72100: Add clock for r7s72100-ether
  ARM: shmobile: r8a7791 clock: add QSPI clocks
  ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
  ARM: shmobile: r7s72100 clock: Add RSPI clocks
  ARM: shmobile: r8a7790: add audio clock
  ARM: shmobile: r8a7778: add audio clock in new style

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-03-17 00:36:37 -07:00
Zhangfei Gao
62ac983b61 clk: hisilicon: add hi3620_mmc_clks
Suggest by Arnd: abstract mmc tuning as clock behavior,
also because different soc have different tuning method and registers.
hi3620_mmc_clks is added to handle mmc clock specifically on hi3620.

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-02-26 16:03:56 -08:00