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9992 Commits

Author SHA1 Message Date
Alex Deucher
d525eb8d2e drm/amdgpu: add ELM/BAF DCE11 configs (v2) 
Add support for the display configuration on elm/baf.

v2: add missing Stoney case

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2016-05-04 20:23:28 -04:00
Alex Deucher
b81223001f drm/amdgpu: add ELM/BAF asic types 
New asic types for ellesmere and baffin.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2016-05-04 20:23:22 -04:00
Alex Deucher
7edbb0d389 drm/amd: add DCE 11.2 register headers 
Add register headers for DCE (Display and Composition Engine)
11.2.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:23:19 -04:00
Christian König
b76af4a419 drm/amdgpu: remove sorting of CS BOs 
Not needed any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:23:12 -04:00
Christian König
29b3259a3a drm/amdgpu: group BOs by log2 of the size on the LRU v2 
This allows us to have small BOs on the LRU before big ones.

v2: fix of by one and list corruption bug

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:23:08 -04:00
Dave Airlie
1359d6e494 drm/amdgpu: drop apply quirks for now. 
This isn't being used so drop it.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:23:02 -04:00
Chunming Zhou
178d7cb8d5 drm/amdgpu: fix error checking when reuse vmid on same ring 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:58 -04:00
Chunming Zhou
68befebee4 drm/amdgpu: only update last_flush when vmid doesn't have other new owner 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:55 -04:00
Chunming Zhou
66067ad73c drm/amdgpu: double fence slot 
we introduced vmid fence, so one hw submission could produce two fences.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:48 -04:00
Alex Deucher
1bf912ffa6 drm/amdgpu: enable sdma clockgating on ST 
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:45 -04:00
Alex Deucher
6f17a257d3 drm/amdgpu: enable sdma clockgating on CZ 
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:40 -04:00
Alex Deucher
ce22362b79 drm/amdgpu/sdma: rename fiji cg functions 
They care common for all sdma 3.0 parts

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:36 -04:00
Alex Deucher
b6711d1b88 drm/amdgpu: enable gmc clockgating for ST 
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:34 -04:00
Alex Deucher
03c335d3d5 drm/amdgpu: enable gmc clockgating for CZ 
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:30 -04:00
Alex Deucher
76f10b9ada drm/amdgpu/vi: rename fiji cg functions 
They can be used for other VI parts.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:27 -04:00
Alex Deucher
6469490567 drm/amdgpu: enable gfx clockgating for ST (v2) 
v2: just enable MGCG for now since CGCG causes hangs

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:24 -04:00
Alex Deucher
70eced9b2e drm/amdgpu: enable gfx clockgating for CZ 
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:20 -04:00
Alex Deucher
dbff57bc7b drm/amdgpu/gfx: rework fiji cg functions so they can be shared 
They can be shared with other asics with minor modifications.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:17 -04:00
Alex Deucher
79e5412c58 drm/amdgpu: add a new set of rlc function pointers 
Different asics tend to have different ways to interact
with the RLC.  This just covers enter/exit of safe mode
for updating CG and PG state, but could be extended to
cover other RLC operations in the future if necessary.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:11 -04:00
Alex Deucher
146f256fae drm/amdgpu/gfx: adjust gfx_v8_0_send_serdes_cmd for ST 
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:05 -04:00
Alex Deucher
79deaaf4a9 drm/amdgpu/gfx8: rename send_serdes_cmd 
So it can be shared with CZ/ST.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:22:02 -04:00
Alex Deucher
3fde56b8db drm/amdgpu/gmc: add proper CG flags for fiji 
We were already enabling these CG features, this uses
the standard interface for doing so.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:21:59 -04:00
Alex Deucher
c90766cf4e drm/amdgpu/common: add proper CG flags for fiji 
We were already enabling these CG features, this uses
the standard interface for doing so.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:21:55 -04:00
Alex Deucher
e08d53cb69 drm/amdgpu/sdma: add proper CG flags for fiji 
We were already enabling these CG features, this uses
the standard interface for doing so.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:21:52 -04:00
Alex Deucher
14698b6c79 drm/amdgpu/gfx: add proper CG flags for fiji 
We were already enabling these CG features, this uses
the standard interface for doing so.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:21:48 -04:00
Alex Deucher
4fae91c5e2 drm/amdgpu: add new CG flag for ROM clockgating 
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:21:43 -04:00
Christian König
98c2872ae9 drm/ttm: implement LRU add callbacks v2 
This allows fine grained control for the driver where to add a BO into the LRU.

v2: fix typo in comment

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:21:38 -04:00
Christian König
dfd5e50ea4 drm/ttm: remove use_ticket parameter from ttm_bo_reserve 
Not used any more.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:21:21 -04:00
Christian König
eb43096900 drm/amdgpu: fix the coding style in amdgpu_ring.c 
No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:21:12 -04:00
Christian König
771c8ec177 drm/amdgpu: use the ring name for debugfs (v2) 
Instead of hard coding just another name in the ring code.

v2: squash in Tom's rebase fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:21:03 -04:00
Christian König
b38d99c4f4 drm/amdgpu: reduce the ring size for SDMA 
Those are way too large.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:58 -04:00
Christian König
2800de2e9e drm/amdgpu: reduce the ring size for GFX 
Those are way too large.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:54 -04:00
Christian König
a3f1cf355e drm/amdgpu: use max_dw in ring_init 
Instead of specifying the total ring size calculate that from the maximum
number of dw a submission can have and the number of concurrent submissions.

This fixes UVD with 8 concurrent submissions or more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:50 -04:00
Eric Huang
9331b9ca81 drm/amd/powerplay: fix fan speed percent setting error on Fiji 
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:46 -04:00
Eric Huang
d9624f8c68 drm/amd/powerplay: fix fan speed percent setting error on Tonga 
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:42 -04:00
Dave Airlie
110e6f26af drm/amd: make a type-safe cgs_device struct. (v2) 
This is just a type-safety things to avoid everyone taking void *,
it doesn't change anything.

v2: agd5f: split out the dal changes into a separate patch.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:28 -04:00
Arindam Nath
c036554170 drm/amdgpu: handle more than 10 UVD sessions (v2) 
Change History
--------------

v2:
- Make firmware version check correctly. Firmware
  versions >= 1.80 should all support 40 UVD
  instances.
- Replace AMDGPU_MAX_UVD_HANDLES with max_handles
  variable.

v1:
- The firmware can handle upto 40 UVD sessions.

Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Ayyappa Chandolu <ayyappa.chandolu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:23 -04:00
Nils Wallménius
aeba709a15 drm/amd: make some function-local tables static const 
These tables were initialized on stack on each call, avoid that
and save a little bit of text size.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:20 -04:00
Nils Wallménius
e90b62277b drm/amd/powerplay: mark phm_master_table_* structs as const 
Also adjust phm_construct_table to take a const pointer

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:17 -04:00
Nils Wallménius
d3a84aa074 drm/amd/powerplay: Mark pem_event_action chains as const 
As these arrays were of pointer to pointer type, they were
pointer to pointer to const. Make them pointer to const
pointer to const.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:13 -04:00
Nils Wallménius
06ab6832ac drm/amdgpu: Mark all instances of struct drm_info_list as const 
All these are compile time constand and the
drm_debugfs_create/remove_files functions take a const
pointer argument.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:10 -04:00
Nils Wallménius
62250a910a drm/amd/scheduler: Mark amdgpu_sched_ops const 
This marks the struct amdgpu_sched_ops const and
adjusts amd_sched_init to take a const pointer
for the ops param. The ops member of
struct amd_gpu_scheduler is also changed to const.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:05 -04:00
Nils Wallménius
f498d9ed26 drm/amd: Mark some tables as const 
This patch marks some compile-time constant tables 'const'.
The tables marked in this patch are the low hanging fruit
where little other changes were necesary to avoid casting
away constness etc. Also mark some tables that are private
to a file as static.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:20:00 -04:00
Alex Deucher
7e8d1fbdc0 drm/amd/powerplay: fix stutter setup in mclk level init 
Stale ifdef.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:19:53 -04:00
Christian König
794f50b95d drm/amdgpu: reuse VMIDs already assigned to a process 
If we don't need to flush we can easily use another VMID
already assigned to the process.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:19:30 -04:00
Christian König
41d9eb2c5a drm/amdgpu: add a fence after the VM flush 
This way we can track when the flush is done.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:19:24 -04:00
Christian König
832a902f94 drm/amdgpu: use a sync object for VMID fences v2 
v2: rebase & cleanup

This way we can store more than one fence as user for each VMID.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:19:16 -04:00
Christian König
bcb1ba35a8 drm/amdgpu: merge VM manager and VM context ID structure 
No need to have two of them any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:19:13 -04:00
Andrey Grodzovsky
bd4c72d1e9 drm/amdgpu: Set PFLIP_SUBMITTED for crtc after address update 
Also add some pflip debug prints.

This change allows us to wait on pflip status until the new surface address
is actually submitted to the register.

This reverts ed3020e923240829dcdfd3343f6e91dc02c63775
drm/amdgpu: Move MMIO flip out of spinlocked region
The original change assumed DAL will aquire locks inside DAL
implemetion of page_flip callback which eventaully didn't happen.

This moves the flip before status update which makes sense for the
non-DAL code pathes as well.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:19:07 -04:00
Eric Huang
a4333b4c99 drm/amd/powerplay: add deep sleep divider id into DPM table on Tonga 
Add a proper implementation for setting the deep sleep divider.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:18:40 -04:00