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6897 Commits

Author SHA1 Message Date
Rex Zhu
49fd66e5d5 drm/amd/pp: Update smu7 dpm table with OD clock/voltage 
Delete old OD type code path when populate clk.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:19 -05:00
Rex Zhu
5e4d4fbea5 drm/amd/pp: Implement edit_dpm_table on smu7 
v2: - check clk against OverDrive limits from VBIOS
    - set OD flag when user commit the setting.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:19 -05:00
Rex Zhu
b7e919b940 drm/amd/pp: Disable OD feature on APU/Iceland 
Not supported on APUs or Iceland.
and still not enabled on CI.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:18 -05:00
Rex Zhu
3abb20264d drm/amd/pp: Disable OD feature if VBIOS limits 
Check vbios to determine whether we can enable OD

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:18 -05:00
Rex Zhu
e3933f26b6 drm/amd/pp: Add edit/commit/show OD clock/voltage support in sysfs 
when cat pp_od_clk_voltage it show
OD_SCLK:
0:        300Mhz        800 mV
1:        466Mhz        818 mV
2:        751Mhz        824 mV
3:       1019Mhz        987 mV
4:       1074Mhz       1037 mV
5:       1126Mhz       1087 mV
6:       1169Mhz       1137 mV
7:       1206Mhz       1150 mV
OD_MCLK:
0:        300Mhz        800 mV
1:       1650Mhz       1000 mV

echo "s/m level clock voltage" to change
sclk/mclk's  clock and voltage

echo "r" to restore default value.
echo "c" to commit the user setting.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:17 -05:00
Rex Zhu
897e1bbeec drm/amd/pp: Add hwmgr interface for edit dpm table 
Add odn_edit_dpm_table function
points for setting user assigned clock/voltage.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:16 -05:00
Alex Deucher
9950cda2a0 drm/amdgpu: drop the drm irq pre/post/un install callbacks 
The preinstall callback didn't do anything because not all
of the IPs were initialized when it was called.

Move the postinstall setup into sequence in the driver.

The uninstall callback disabled all interrupt source, but
it got called too late in the driver sequence and caused problems
with IPs who already freed the relevant data structures.  Move
the call into the right place in the driver sequence.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Tested-By: Mikita Lipski <mikita.lipski@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:16 -05:00
Alex Deucher
04f618eb3b drm/amdgpu/powerplay/vega10: fix compute profile name 
COMPUTER -> COMPUTE

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:15 -05:00
Hawking Zhang
d0b3c710cf drm/amdgpu: retire soc15ip.h 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:15 -05:00
Hawking Zhang
407e75170f drm/amd/dc: include new ip and ip_offset headers 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:14 -05:00
Hawking Zhang
48569ffce9 drm/amd/pp: include new ip and ip offset headers 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:13 -05:00
Hawking Zhang
f797dd5184 drm/amdgpu: include new ip and ip offset headers 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:13 -05:00
Hawking Zhang
acdf249f31 drm/amdgpu: split soc15ip header into ip and ip_offset header 
ip base could be different per ASIC since from soc15. split soc15
header into common ip/hw_id header and asic specific ip offset header

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:12 -05:00
Andrey Grodzovsky
7cce958431 drm/amdgpu: Use new TTM flag to avoid OOM triggering. 
Avoid OOM on syatem pages allocations.

v2:
Remove modeprobe parameter, make this behaviour the only option.

v3:
Move setting no_retry flag into amdgpu_ttm_init.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:12 -05:00
Christian König
250b422833 drm/amdgpu: add PASID mapping for GMC v9 
This way we can see the PASID in VM faults.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:11 -05:00
Christian König
86ea2ff698 drm/amdgpu: add PASID mapping for GMC v8 
This way we can see the PASID in VM faults.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:11 -05:00
Christian König
0da63bbb5b drm/amdgpu: add PASID mapping for GMC v7 
This way we can see the PASID in VM faults.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:10 -05:00
Christian König
9096d6e51a drm/amdgpu: implement gmc_v9_0_emit_flush_gpu_tlb 
Unify tlb flushing for gmc v9.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:09 -05:00
Christian König
5518625d6a drm/amdgpu: implement gmc_v8_0_emit_flush_gpu_tlb 
Unify tlb flushing for gmc v8.

v2: handle UVD v6 as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:09 -05:00
Christian König
d9a701ccd6 drm/amdgpu: implement gmc_v7_0_emit_flush_gpu_tlb 
Unify tlb flushing for gmc v7.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:08 -05:00
Christian König
4fef88bd00 drm/amdgpu: implement gmc_v6_0_emit_flush_gpu_tlb 
Unify tlb flushing for gmc v6.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:08 -05:00
Christian König
7ef11047c1 drm/amdgpu: add new amdgpu_gmc_emit_flush_gpu_tlb callback 
Add a new GMC function to unify vm flushing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:07 -05:00
Christian König
0b5f83a375 drm/amdgpu: wire up emit_wreg for VCN v1 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:07 -05:00
Christian König
cf912c8fd8 drm/amdgpu: wire up emit_wreg for VCE v4 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:06 -05:00
Christian König
b6cb3b5c13 drm/amdgpu: wire up emit_wreg for UVD v7 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:05 -05:00
Christian König
252998986a drm/amdgpu: wire up emit_wreg for UVD v6 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:05 -05:00
Christian König
4ca54b358b drm/amdgpu: wire up emit_wreg for SDMA v4 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:04 -05:00
Christian König
3d31d4cb2c drm/amdgpu: wire up emit_wreg for SDMA v3 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:04 -05:00
Christian König
a355d0f5e6 drm/amdgpu: wire up emit_wreg for SDMA v2.4 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:03 -05:00
Christian König
a37e69db4f drm/amdgpu: wire up emit_wreg for CIK SDMA 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:03 -05:00
Christian König
5b9263d9f2 drm/amdgpu: wire up emit_wreg for SI DMA 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:02 -05:00
Christian König
254e825b37 drm/amdgpu: wire up emit_wreg for gfx v9 
Needed for vm_flush unification.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:01 -05:00
Christian König
9ed88047d4 drm/amdgpu: wire up emit_wreg for gfx v8 
Needed for vm_flush unification.

v2: handle compute rings as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:01 -05:00
Christian König
3f3e9de803 drm/amdgpu: wire up emit_wreg for gfx v7 
Needed for vm_flush unification.

v2: handle compute rings as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:00 -05:00
Christian König
e18fb1fd34 drm/amdgpu: wire up emit_wreg for gfx v6 
Needed for vm_flush unification.

v2: handle compute rings as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:00 -05:00
Rex Zhu
7b158d1691 drm/amdgpu: Bump driver version for sensor pstate clk 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:58 -05:00
Rex Zhu
60bbade2a6 drm/amdgpu: Expose more GPU sensor queries 
Add sub-queries for stable pstate shader/memory clock.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:57 -05:00
Chunming Zhou
156a81be3f drm/amdgpu: all vram is visible for APU (v2) 
missed in gmc9.

v2: squash in build fix (Rex)

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:57 -05:00
Rex Zhu
6df21b7726 drm/amd/pp: Add OD driver clock/voltage display on smu7 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:56 -05:00
Rex Zhu
5d97cf39ff drm/amd/pp: Add and initialize OD_dpm_table for CI/VI. 
Add initial infrastructure for manual dpm control.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:56 -05:00
Rex Zhu
11f64ff5f3 drm/amd/pp: Add a new pp feature mask bit for OD feature 
when this bit was set on module load,
driver will allow the user over/under gpu
clock and voltage through sysfs.

by default, this bit was not set.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:55 -05:00
Rex Zhu
59fc8cde73 drm/amd/pp: Move DPMTABLE_* definitions to common header file 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:54 -05:00
Rex Zhu
ee85c07abe drm/amd/pp: Refine code abbreviate variable name 
abbreviate variable name number_of_performance_levels
to num_of_pl in struct phm_odn_clock_levels

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:54 -05:00
Rex Zhu
5ed8d656d6 drm/amd/pp: Add stable Pstate clk display support in debugfs 
The additional output are: PSTATE_SCLK and PSTATE_MCLK value
in MHz as:

300 MHz (PSTATE_SCLK)
300 MHz (PSTATE_MCLK)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:53 -05:00
Rex Zhu
dd70949d90 drm/amd/pp: Store stable Pstate clocks 
User can use to calculate profiling ratios when
set UMD Pstate.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:53 -05:00
Rex Zhu
6390258a2f drm/amd/pp: Add custom power profile mode support on Vega10 
v2: delete uncessary blank line.
    Add static const modifiers to an array

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:52 -05:00
Rex Zhu
37c5c4dbf0 drm/amdgpu: add custom power policy support in sysfs 
when cat pp_power_profile_mode on Vega10
NUM        MODE_NAME BUSY_SET_POINT FPS USE_RLC_BUSY MIN_ACTIVE_LEVEL
  0 3D_FULL_SCREEN :             70  60          1              3
  1   POWER_SAVING :             90  60          0              0
  2          VIDEO*:             70  60          0              0
  3             VR :             70  90          0              0
  4       COMPUTER :             30  60          0              6
  5         CUSTOM :              0   0          0              0

the result show all the profile mode we can support and custom mode.
user can echo the num(0-4) to pp_power_profile_mode to select the profile
mode or can echo "5 value value value value" to enter CUSTOM mode.
the four parameter is set_point/FPS/USER_RLC_BUSY/MIN_ACTIVE_LEVEL.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:52 -05:00
Rex Zhu
e8ea1b9aa0 drm/amd/pp: Fix SMIO implementation on CI 
Setup smio table(smio registers's address and voltage ID)
for various voltage domain.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:51 -05:00
Rex Zhu
53241e01b9 drm/amd/pp: Implement voltage regulator config on CI 
Store the voltage regulator configuration
so we can properly query the voltage

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:50 -05:00
Rex Zhu
59655cb6ab drm/amd/pp: Add querying current gfx voltage for Vega10 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:17:50 -05:00