xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
815,968 Commits 2 Branches 0 Tags
c5943b9c5312d4fa23175ff146e901b865e4a60a
Commit Graph

9085 Commits

Author SHA1 Message Date
Christian König
16a7133f35 drm/amdgpu: fix coding style in the scheduler v2 
v2: fix even more

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:50 -04:00
Eric Huang
3cc259112d drm/amdgpu: add the CI code to enable sclk OD(OverDrive) 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:49 -04:00
Eric Huang
19fbc43a86 drm/amdgpu: add the CI code to enable clock level selection 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:48 -04:00
Eric Huang
8b2e574dc4 drm/amdgpu: add the new common pm code to support sclk OD 
This extends OD (OverDrive) support to the non-Powerplay code paths.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:48 -04:00
Eric Huang
c85e299ff9 drm/amdgpu: add the new common pm code to select the clock levels 
This extends dpm clock level selection to the non-powerplay code paths.
This interface can be used to select individual clock levels.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:47 -04:00
Tom St Denis
9bf51b0719 drm/amdgpu/gfx8: Enable GFX PG on CZ 
Based on Alex's patches this enables GFX PG on CZ.

Tested with xonotic-glx/glxgears/supertuxkart and idle desktop.
Also read-back registers via umr for verificiation that the bits
are truly enabled.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:47 -04:00
Alex Deucher
7ba0eb6df9 drm/amdgpu/gfx8: clean up polaris11 PG enable 
Fix the logic for enabling/disabling.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:46 -04:00
Alex Deucher
2c54716563 drm/amdgpu/gfx8: add powergating support for CZ/ST 
This implements powergating support for CZ/ST asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:45 -04:00
Alex Deucher
6b0432b703 drm/amdgpu: add new GFX powergating types 
Add some new GFX powergating flags.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:45 -04:00
Alex Deucher
c2546f55dd drm/amdgpu/gfx8: rename some pg functions 
So they can be shared with other asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:44 -04:00
Alex Deucher
fb16007bf0 drm/amdgpu/gfx8: add state setup for CZ/ST GFX power gating 
This sets up the CP jump table and GDS buffer and sets the
PG state registers.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:44 -04:00
Alex Deucher
e36091edd3 drm/amdgpu/gfx7: expand cp jt size to handle GDS as well 
The size needs to handle the CP JT and GDS.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:42 -04:00
Eric Huang
09a0426404 drm/amd/powerplay: add sclk OD support on Polaris10 
This implements sclk overdrive(OD) overclocking support for Polaris10,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:42 -04:00
Eric Huang
9ccd4e1346 drm/amd/powerplay: add sclk OD support on Tonga 
This implements sclk overdrive(OD) overclocking support for Tonga,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:41 -04:00
Eric Huang
decb5fb6f2 drm/amd/powerplay: add sclk OD support on Fiji 
This implements sclk overdrive(OD) overclocking support for Fiji,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:41 -04:00
Eric Huang
428bafa86c drm/amdgpu: add powerplay sclk OD support through sysfs (v2) 
Add a new sysfs entry pp_sclk_od to support sclk overdrive(OD) overclocking,
the entry is read/write, the value of input/output is an integer which is the
over percentage of the highest sclk.

v2: drop extra semicolon

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:40 -04:00
Alex Deucher
2254c21982 drm/amdgpu: load different smc firmware on some CI variants 
The power tables on some variants require different firmware.
This fixes stability issues on some newer CI parts.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=91880

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:38 -04:00
Monk Liu
cc7d8c7979 drm/amdgpu: clear RB at ring init 
This help fix reloading driver hang issue of SDMA
ring.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:37 -04:00
Rex Zhu
ab6bad05c8 drm/amd/powerplay: Update CKS on/ CKS off voltage offset calculation. 
As get the right evv voltage, update them to latest coefficients to
align with BB.

agd: squash in Slava's 32 bit build fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-06 17:56:31 -04:00
Rex Zhu
e5eb37170b drm/amd/powerplay: fix bug that get wrong polaris evv voltage. 
value is 32 bits for polaris, not 16.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-06 17:44:14 -04:00
Rex Zhu
4b2427605e drm/amd/powerplay: incorrectly use of the function return value 
'0' means true.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2016-07-06 17:43:59 -04:00
Huang Rui
1dfefee893 drm/amd/powerplay: fix incorrect voltage table value for tonga 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2016-07-06 16:16:43 -04:00
Huang Rui
095d28c62f drm/amd/powerplay: fix incorrect voltage table value for polaris10 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-06 16:16:09 -04:00
Oded Gabbay
7fd5e03ca6 drm/amdkfd: destroy mutex if process creation fails 
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
 2016-07-03 08:05:45 +03:00
Bhaktipriya Shridhar
fd320bf692 drm/amdkfd: Remove create_workqueue() 
alloc_workqueue replaces deprecated create_workqueue().

create_workqueue has been replaced with alloc_workqueue with max_active
as 0 since there is no need for throttling the number of active work items.

WQ_MEM_RECLAIM has not been set to because kfd_process_wq will not be
used in memory reclaim path.

kfd_process_wq is used for delay destruction. A work item embedded in
kfd_process gets queued to kfd_process_wq and when it executes it
destroys and frees the containing kfd_process and thus itself.

This requires a dedicated workqueue because a work item once queued, may
get freed at any point of time and any external entity cannot
flush the work item. So, in order to wait for such a work item,
it needs to be put on a dedicated workqueue.

kfd_module_exit() calls kfd_process_destroy_wq which ensures that all
pending work items are finished before the module is removed.

flush_workqueue is unnecessary since destroy_workqueue() itself calls
drain_workqueue() which flushes repeatedly till the workqueue
becomes empty.

Hence flush_workqueue has been removed.

Signed-off-by: Bhaktipriya Shridhar <bhaktipriya96@gmail.com>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
 2016-07-03 08:05:45 +03:00
Dave Airlie
542d972221 Back-merge tag 'v4.7-rc5' into drm-next 
Linux 4.7-rc5

The fsl-dcu pull needs -rc3 so go to -rc5 for now.
 2016-07-02 15:56:01 +10:00
Rex Zhu
a7f14a184e drm/amd/powerplay: workaround for UVD clock issue 
workaround issue that when uvd dpm disabled,
uvd clock remain high on polaris10. Manually turn
off the clocks.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-29 12:12:26 -04:00
Ken Wang
d9d533c148 drm/amdgpu: add ACLK_CNTL setting for polaris10 
This is a temporary workaround for early boards.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-29 12:10:31 -04:00
Rex Zhu
0636e0d666 drm/amd/powerplay: fix issue uvd dpm can't enabled on Polaris11. 
1. Populate correct value of VDDCI voltage for SMC SAMU, VCE,
   and UVD levels depending on whether VDDCi control is SVI2 or GPIO.
2. Populate SMC ACPI minimum voltage using VBIOS boot SCLK and MCLK

When static voltage is configured as VDDCI, driver still tries to program
a voltage for MM minVoltage using VDDC-VDDCI delta requirement.
minVoltage should be set as boot up voltage.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-29 12:10:02 -04:00
Rex Zhu
3a8bd717ee drm/amd/powerplay: Workaround for Memory EDC Error on Polaris10. 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-29 12:09:27 -04:00
Lukas Wunner
84b89bdced drm/amdgpu: Turn off CRTCs on driver unload 
amdgpu leaks a runtime pm ref if at least one CRTC is enabled on unload.
The ref is taken by amdgpu_crtc_set_config() and held as long as a CRTC
is in use. Fix by turning off all CRTCs on unload.

Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/7bf8d9ceb9d343a7495788667e6da170b8fd3af1.1465392124.git.lukas@wunner.de
 2016-06-24 08:49:35 +02:00
Lukas Wunner
6ce62d8b6f drm/amdgpu: Forbid runtime pm on driver unload 
The PCI core calls pm_runtime_forbid() on device probe in pci_pm_init(),
making this the default state when amdgpu is loaded.
amdgpu_driver_load_kms() therefore calls pm_runtime_allow(), but there's
no pm_runtime_forbid() in amdgpu_driver_unload_kms() to balance it. Add
it so that we leave the device in the same state that we found it.

This isn't a bug, it's just good housekeeping. When amdgpu is first
loaded with runpm=1, then unloaded and loaded again with runpm=0,
pm_runtime_forbid() will be called from amdgpu_pmops_runtime_idle() or
amdgpu_pmops_runtime_suspend(), so the behaviour is correct. If there
ever is a third party driver for AMD cards, this commit avoids that it
has to clean up behind amdgpu.

Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/ccd4f7208acbd7761364418fc34f7849acbb4597.1465392124.git.lukas@wunner.de
 2016-06-24 08:49:32 +02:00
Lukas Wunner
c9c9bbd754 drm/amdgpu: Don't leak runtime pm ref on driver load 
If an error occurs in amdgpu_device_init() after adev->rmmio has been
set, its caller amdgpu_driver_load_kms() will skip runtime pm
initialization and call amdgpu_driver_unload_kms(), which acquires a
runtime pm ref that is leaked.

Balance by releasing a runtime pm ref in the error path of
amdgpu_driver_load_kms().

Fixes: d38ceaf99e ("drm/amdgpu: add core driver (v4)")
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/9a53449865759d7499a439ca2776093ee117b1eb.1465392124.git.lukas@wunner.de
 2016-06-24 08:49:31 +02:00
Lukas Wunner
4a7885476a drm/amdgpu: Don't leak runtime pm ref on driver unload 
amdgpu_driver_load_kms() calls pm_runtime_put_autosuspend() if
amdgpu_device_is_px(dev), but amdgpu_driver_unload_kms() calls
pm_runtime_get_sync() unconditionally. We therefore leak a runtime pm
ref whenever amdgpu is unloaded on a non-PX machine or if runpm=0. The
GPU will subsequently never runtime suspend after loading amdgpu again.

Fix by taking the runtime pm ref under the same condition that it was
released on driver load.

Fixes: d38ceaf99e ("drm/amdgpu: add core driver (v4)")
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/86364eeb5711323608930c4f0f69046792ff6d3c.1465392124.git.lukas@wunner.de
 2016-06-24 08:49:30 +02:00
Rex Zhu
0812a945fb drm/amd/powerplay: Update CKS on/ CKS off voltage offset calculation 
CKS on/off voltage offset calculation algorithm takes in a few coefficients.
We need to update them for polaris to latest coefficients to align with BB.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-23 14:15:10 -04:00
Rex Zhu
83a7af6dcf drm/amd/powerplay: disable FFC. 
SMC need use VBI signal for MCLK switching
Send 2 x frame time as vbi timeout

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-23 14:14:30 -04:00
Rex Zhu
02bae045f3 drm/amd/powerplay: add some definition for FFC feature on polaris. 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-23 14:14:12 -04:00
Daniel Vetter
a104299b94 drm/amdkfd: Clean up inline handling 
- inline functions need to be static inline, otherwise gcc can opt to
  not inline and the linker gets unhappy.
- no forward decls for inline functions, just include the right headers.

Cc: Oded Gabbay <oded.gabbay@gmail.com>
Cc: Ben Goz <ben.goz@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1466500235-21282-2-git-send-email-daniel.vetter@ffwll.ch
 2016-06-21 21:32:52 +02:00
Rex Zhu
270d013659 drm/amd/powerplay: enable clock stretch feature for polaris 
Power saving feature which reduces the amount of
voltage needed for specific engine clocks.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-21 10:22:42 -04:00
Rex Zhu
92d1576859 drm/amdgpu/gfx8: update golden setting for polaris10 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-21 10:22:42 -04:00
Rex Zhu
432c3a3ca7 drm/amd/powerplay: enable avfs feature for polaris 
avfs feature is for voltage control based on
gpu system clock on polaris10

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-21 10:22:41 -04:00
Rex Zhu
c11cb70483 drm/amdgpu/atombios: add avfs struct for Polaris10/11 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-21 10:22:41 -04:00
Rex Zhu
31b2124377 drm/amd/powerplay: add avfs related define for polaris 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-21 10:22:40 -04:00
Rex Zhu
9a3c1b342b drm/amd/powrplay: enable stutter_mode for polaris. 
To minimize the dram power expenditure during static -screen

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-21 10:22:40 -04:00
Rex Zhu
40787ef21c drm/amd/powerplay: disable UVD SMU handshake for MCLK. 
sync up with internal programming recommendations.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-21 10:22:39 -04:00
Rex Zhu
a2fb4934e9 drm/amd/powerplay: initialize variables which were missed. 
Missing pcie dpm settings.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-21 10:22:38 -04:00
Rex Zhu
919e334dec drm/amd/powerplay: enable PowerContainment feature for polaris10/11. 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-06-21 10:22:38 -04:00
Rex Zhu
0a4fef559b drm/amd/powerplay: need to notify system bios pcie device ready 
before request performance state.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2016-06-21 10:22:37 -04:00
Rex Zhu
576b4401b1 drm/amd/powerplay: fix bug that function parameter was incorect. 
Wrong value passed to acpi_pcie_perf_request.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2016-06-21 10:22:37 -04:00
Rex Zhu
1d7b84d12a drm/amd/powerplay: fix logic error. 
the error lead powerplay can't get display info in DGPU case.
store_cc6_data just implement in APU.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2016-06-21 10:22:29 -04:00