Kuninori Morimoto
6a0abce4c4
sh: include: convert to SPDX identifiers
...
Update license to use SPDX-License-Identifier instead of verbose license
text.
Link: http://lkml.kernel.org/r/87ftvccszx.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com >
Reviewed-by: Simon Horman <horms+renesas@verge.net.au >
Cc: Rich Felker <dalias@libc.org >
Cc: Yoshinori Sato <ysato@users.sourceforge.jp >
Signed-off-by: Andrew Morton <akpm@linux-foundation.org >
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org >
2018-12-28 12:11:45 -08:00
Thomas Petazzoni
bc05aa6e13
arch/sh: add sh7786_mm_sel() function
...
The SH7786 has different physical memory layout configurations,
configurable through the MMSELR register. The configuration is
typically defined by the bootloader, so Linux generally doesn't care.
Except that depending on the configuration, some PCI MEM areas may or
may not be available. This commit adds a helper function that allows
to retrieve the current physical memory layout configuration. It will
be used in a following patch to exclude unusable PCI MEM areas during
the PCI initialization.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com >
Signed-off-by: Rich Felker <dalias@libc.org >
2018-04-12 19:47:53 -04:00
Laurent Pinchart
cc88ec4875
sh: sh7786: Fix port E, G and J GPIOs
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The port E, G and J GPIOs don't match the SoC datasheet (they seem to
have been copied from the SH7785). Fix them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com >
Acked-by: Linus Walleij <linus.walleij@linaro.org >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2013-01-25 09:24:19 +09:00
Kuninori Morimoto
1c58b0b1a1
sh: Tidy up sh7786 pinmux table.
...
Formatting and typo fix.
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com >
Signed-off-by: Paul Mundt <lethal@linux-sh.org >
2009-03-31 07:39:51 +09:00
Kuninori Morimoto
55ba99eb21
sh: Add support for SH7786 CPU subtype.
...
This adds preliminary support for the SH7786 CPU subtype.
While this is a dual-core CPU, only UP is supported for now. L2 cache
support is likewise not yet implemented.
More information on this particular CPU subtype is available at:
http://www.renesas.com/fmwk.jsp?cnt=sh7786_root.jsp&fp=/products/mpumcu/superh_family/sh7780_series/sh7786_group/
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com >
Signed-off-by: Paul Mundt <lethal@linux-sh.org >
2009-03-03 15:40:25 +09:00
