2 Commits

Author	SHA1	Message	Date
Jernej Skrabec	d18e85349f	clk: sunxi-ng: r40: Export video PLLs ... Video PLLs need to be referenced in R40 DT as possible HDMI PHY parent. Export them. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>	2018-06-27 19:06:56 +02:00
Icenowy Zheng	cd030a78f7	clk: sunxi-ng: support R40 SoC ... Allwinner R40 SoC have a clock controller module in the style of the SoCs beyond sun6i, however, it's more rich and complex. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Chen-Yu Tsai <wens@csie.org>	2017-08-19 17:04:37 +08:00