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11865 Commits

Author SHA1 Message Date
Christian König
b07c9d2a73 drm/amdgpu: move more logic into amdgpu_vm_map_gart v3 
No need to duplicate that code over and over again. Also stop using the
flags to determine if we need to map the addresses.

v2: constify the pages_addr
v3: rebased, fix typo in commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:04 -05:00
Christian König
599f434817 drm/amdgpu: remove nonsense IB size checks 
Those are just leftovers from the time we wrote the VM
updates directly to the ring.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:04 -05:00
Christian König
fe6b2ad91f drm/amdgpu: use WARN_ON_ONCE instead of BUG_ON in the SA 
Crashing the system doesn't helps at all. Also properly return
-EINVAL if size or alignment are outside valid ranges.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:03 -05:00
Monk Liu
777dbd458c drm/amdgpu: drop a dummy wakeup scheduler 
since the dependency job is also scheduled by the same
scheduler with the job depended on it, no need to
call wake up scheduler when the dep is scheduled.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:02 -05:00
Alex Deucher
f2802faa05 drm/amd: add dce8 enum register header 
This adds the DCE8 enum header.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:02 -05:00
Eric Huang
5d37a63d26 drm/amd/powerplay: add some hwmgr functions for sysfs interface on Tonga 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:01 -05:00
Eric Huang
d7341ef668 drm/amd/powerplay: add some hwmgr functions for sysfs interface on Carrizo 
These add the interfaces for manual clock control.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:01 -05:00
Eric Huang
b9c1a77e8c drm/amd/powerplay: add hwmgr's functions for Fiji sysfs interfaces. 
These add the interfaces for manual clock control.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:00 -05:00
Eric Huang
f3898ea12f drm/amd/powerplay: add some sysfs interfaces for powerplay. 
The new sysfs interfaces:
pp_num_states: Read-only, return the number of all pp states, 0 if powerplay is not available.
pp_cur_state: Read-only, return the index number of current pp state.
pp_force_state: Read-write, to write a power state index will switch to selected state forcedly and
		enable forced state mode, disable forced state mode. such as "echo >...".
pp_table: Read-write, binary output, to be used to read or write the dpm table, the maximum
		file size is 4KB of page size.
pp_dpm_sclk: Read-write, reading will return a dpm levels list, to write an index number will force
		powerplay to set the corresponding dpm level.
pp_dpm_mclk: same as sclk.
pp_dpm_pcie: same as sclk.

And add new setting "manual" to the existing interface power_dpm_force_performance_level.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:59 -05:00
Christian König
c7e6be2303 drm/amdgpu: remove rptr checking 
With the scheduler enabled we don't need that any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:59 -05:00
Christian König
a27de35caa drm/amdgpu: remove the ring lock v2 
It's not needed any more because all access goes through the scheduler now.

v2: Update commit message.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:58 -05:00
Christian König
a9a78b329a drm/amdgpu: use a global LRU list for VMIDs 
With the scheduler enabled managing per ring LRUs don't
make much sense any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:58 -05:00
Christian König
94dd0a4ae0 drm/amdgpu: merge vm_grab_id and vm_fence v2 
No need for an extra function any more.

v2: comment cleanups

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:57 -05:00
Christian König
8d0a7cea82 drm/amdgpu: grab VMID before submitting job v5 
This allows the scheduler to handle the dependencies on ID contention as well.

v2: grab id only once
v3: use a separate lock for the VMIDs
v4: cleanup after semaphore removal
v5: minor coding style change

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:56 -05:00
Christian König
165e4e07c2 drm/amdgpu: add VM pointer to id trace 
Because of the scheduler all traces come from the same thread now and
can't be distincted otherwise.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:56 -05:00
Alex Deucher
1c343fc9db drm/amdgpu: drop hard_reset module parameter 
It doesn't currently do anything and there's no need for it
going forward since pci config reset will be required as a
fallback even when we have fine grained reset implemented.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:55 -05:00
Alex Deucher
18db89b402 drm/amdgpu: add a debugfs property to trigger a GPU reset 
Ported from similar code in radeon.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:55 -05:00
Alex Deucher
bfa99269ea drm/amdgpu: post card after hard reset 
Posting is required after a pci config reset.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:54 -05:00
Alex Deucher
a2c5c69825 drm/amdgpu: clean up asic level reset for VI 
Drop soft reset, always use pci config reset.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:54 -05:00
Alex Deucher
ceb5bc861e drm/amdgpu: clean up asic level reset for CI 
Drop soft reset, always use pci config reset.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:53 -05:00
Christian König
5907a0d8af drm/amdgpu: cleanup sync_seq handling 
Not used any more without semaphores

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:52 -05:00
Christian König
046c12c67b drm/amdgpu: remove sync_to from sync obj v2 
Not needed any more without semaphores.

v2: remove unused variables as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:52 -05:00
Alex Deucher
ea5e4c8731 drm/amdgpu: remove some more semaphore leftovers 
No longer needed since semaphores were removed.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:51 -05:00
Chunming Zhou
cadf97b196 drm/amdgpu: clean up non-scheduler code path (v2) 
Non-scheduler code is longer supported.

v2: agd: rebased on upstream

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:50 -05:00
Chunming Zhou
be86c606b5 drm/amdgpu: cleanup amdgpu_sync_rings V2 
No longer needed now that semaphores are gone.

V2: remove the first amdgpu_sync_wait in amdgpu_ib_schedule

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com> (V1)
Reviewed-by: Monk Liu <monk.liu@amd.com> (V2)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:50 -05:00
Chunming Zhou
2f4b940033 drm/amdgpu: clean up hw semaphore support in driver 
No longer used.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:49 -05:00
Christian König
a8480309df drm/amdgpu: try to find BO VAs only for the BOs in the list 
The other ones don't have any VAs assigned anyway or are uninteresting to us.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:49 -05:00
Christian König
15486fd20c drm/amdgpu: search only the BO list for VM mappings 
Make UVD/VCE VM emulation more efficient.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:48 -05:00
Christian König
1ea863fd73 drm/amdgpu: keep the prefered/allowed domains in the BO 
Stop copying that to the bo list entry, it doesn't change anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:47 -05:00
Christian König
636ce25c30 drm/amdgpu: cleanup bo list bucket handling 
Move that into the BO list. No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:47 -05:00
Christian König
2a7d9bdabe drm/amdgpu: cleanup amdgpu_cs_parser_relocs 
Rename it to amdgpu_cs_parser_bos and move validation and bo list init there.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:46 -05:00
Christian König
c3cca41e62 drm/amdgpu: cleanup amdgpu_cs_parser structure 
Remove unused user_ptr field, group fields by usage.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:46 -05:00
Christian König
25cfc3c27e drm/amdgpu: group VM mapping tree with its lock (v2) 
And also update the comment.

v2: agd: rebase on usptream.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:45 -05:00
Christian König
36409d122c drm/amdgpu: cleanup amdgpu_cs_list_validate 
No need to actually check the current placement. Just use the allowed domains
when the threshold is reached.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:45 -05:00
Christian König
f69f90a113 drm/amdgpu: fix amdgpu_cs_get_threshold_for_moves handling 
The threshold should only be computed once.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:44 -05:00
Dan Carpenter
9e51021cfd drm/amd/powerplay: indent a couple if statements 
We recently redid the indenting, but missed these two if statements.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:43 -05:00
Christian König
d7006964d4 drm/amdgpu: fix issue with overlapping userptrs 
Otherwise we could try to evict overlapping userptr BOs in get_user_pages(),
leading to a possible circular locking dependency.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:16:43 -05:00
Christian König
cc1de6e800 drm/amdgpu: fix issue with overlapping userptrs 
Otherwise we could try to evict overlapping userptr BOs in get_user_pages(),
leading to a possible circular locking dependency.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2016-02-10 14:07:52 -05:00
Nicolai Hähnle
b19763d0d8 drm/amdgpu: remove unnecessary forward declaration 
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
 2016-02-10 14:07:38 -05:00
Nicolai Hähnle
a8d81b3626 drm/amdgpu: hold reference to fences in amdgpu_sa_bo_new (v2) 
An arbitrary amount of time can pass between spin_unlock and
fence_wait_any_timeout, so we need to ensure that nobody frees the
fences from under us.

A stress test (rapidly starting and killing hundreds of glxgears
instances) ran into a deadlock in fence_wait_any_timeout after
about an hour, and this race condition appears to be a plausible
cause.

v2: agd: rebase on upstream

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
 2016-02-10 14:07:31 -05:00
Flora Cui
ca19852884 drm/amdgpu: fix s4 resume 
No need to re-init asic if it's already been initialized.
Skip IB tests since kernel processes are frozen in thaw.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2016-02-10 14:07:13 -05:00
Lukas Wunner
156d7d4120 vga_switcheroo: Add handler flags infrastructure 
Allow handlers to declare their capabilities and allow clients to
obtain that information. So far we have these use cases:

* If the handler is able to switch DDC separately, clients need to
  probe EDID with drm_get_edid_switcheroo(). We should allow them
  to detect a capable handler to ensure this function only gets
  called when needed.

* Likewise if the handler is unable to switch AUX separately, the active
  client needs to communicate link training parameters to the inactive
  client, which may then skip the AUX handshake and set up its output
  with these pre-calibrated values (DisplayPort specification v1.1a,
  section 2.5.3.3). Clients need a way to recognize such a situation.

The flags for the radeon_atpx_handler and amdgpu_atpx_handler are
initially set to 0, this can later on be amended with
  handler_flags |= VGA_SWITCHEROO_CAN_SWITCH_DDC;
when a ->switch_ddc callback is added.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88861
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61115
Tested-by: Lukas Wunner <lukas@wunner.de>
    [MBP  9,1 2012  intel IVB + nvidia GK107  pre-retina  15"]
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/2b0d93ed6e511ca09e95e45e0b35627f330fabce.1452525860.git.lukas@wunner.de
 2016-02-09 11:21:07 +01:00
Alex Deucher
db5cffcd2b drm/amdgpu/cz: plumb pg flags through to powerplay 
Enable vce and uvd pg based on single set of pg flags.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-08 10:37:48 -05:00
Alex Deucher
52b52a8781 drm/amdgpu/tonga: plumb pg flags through to powerplay 
Enable vce and uvd pg based on single set of pg flags.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-08 10:37:48 -05:00
Alex Deucher
e3b04bc790 drma/dmgpu: move cg and pg flags into shared headers 
So they can be used by powerplay.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-08 10:37:47 -05:00
Alex Deucher
b118af7012 drm/amdgpu: remove unused cg defines 
Leftover from radeon.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-08 10:37:47 -05:00
Alex Deucher
08d3340876 drm/amdgpu: add a cgs interface to fetch cg and pg flags 
Needed to pass the cg and pg info to powerplay.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-08 10:37:46 -05:00
Alex Deucher
f997e6f213 drm/amd/powerplay/tonga: disable vce pg 
Not working reliably yet.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-08 10:37:46 -05:00
Alex Deucher
3d5afb41f8 drm/amd/powerplay/tonga: disable uvd pg 
Not working reliably yet.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-08 10:37:45 -05:00
Alex Deucher
67a0a0fd11 drm/amd/powerplay/cz: disable vce pg 
Not working reliably yet.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-08 10:37:45 -05:00