Noralf Trønnes
ab77e02ce9
drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()
...
This driver can use drm_fb_helper_lastclose() in its .lastclose function.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Remove the unused driver implementations.
Cc: Alex Deucher <alexander.deucher@amd.com >
Cc: "Christian König" <christian.koenig@amd.com >
Signed-off-by: Noralf Trønnes <noralf@tronnes.org >
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:33 -05:00
Christian König
d4b7648d6d
drm/amdgpu: fix amdgpu_sync_resv v2
...
Fixes a bug introduced by AMDGPU_GEM_CREATE_EXPLICIT_SYNC. We still need
to wait for pipelined moves in the shared fences list.
v2: fix typo
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Andres Rodriguez <andresx7@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:32 -05:00
Roger He
5f97fc0e03
drm/amd/amdgpu: set gtt size according to system memory size only
...
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Roger He <Hongbo.He@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:31 -05:00
Andrey Grodzovsky
cebb52b7bc
drm/amdgpu: Get rid of dep_sync as a seperate object.
...
Instead mark fence as explicit in it's amdgpu_sync_entry.
v2:
Fix use after free bug and add new parameter description.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:31 -05:00
Christian König
97489129c2
drm/amdgpu: allow specifying vm_block_size for multi level PDs v2
...
This patch allows specifying the vm_block_size even when multi level
page directories are active.
v2: fix signed/unsigned compare warning
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:31 -05:00
Christian König
f3368128ba
drm/amdgpu: move validation of the VM size into the VM code
...
This moves validation of the VM size parameter into amdgpu_vm_adjust_size().
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:30 -05:00
Christian König
341b759e64
drm/amdgpu: allow non pot VM size values
...
The VM size actually doesn't need to be a power of two.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:30 -05:00
Christian König
36539dcea3
drm/amdgpu: choose number of VM levels based on VM size
...
This allows us limiting the VM size for testing even of Vega10.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:29 -05:00
Christian König
b38f41ebb8
drm/amdgpu: unify VM size handling of Vega10 with older generation
...
One function to rule them all.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:29 -05:00
Christian König
0410c5e514
drm/amdgpu: fix amdgpu_vm_num_entries
...
The block size only affects the leave nodes, everything else is fixed.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:29 -05:00
Christian König
507831473f
drm/amdgpu: fix VM PD addr shift
...
The block size only affects the leave nodes, everything else is fixed.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:28 -05:00
Frank Min
722570435b
drm/amdgpu: correct vce4.0 fw config for SRIOV (V2)
...
1. program vce 4.0 fw with 48 bit address
2. correct vce 4.0 fw stack and date offset
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Frank Min <Frank.Min@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:28 -05:00
Feifei Xu
b1ebd7c0cd
drm/amd/include:cleanup raven1 vcn header files.
...
Cleanup asic_reg/raven1/VCN folder. Remove unused vcn_1_0_default.h.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:26 -05:00
Feifei Xu
51199920a2
drm/amd/include:cleanup raven1 nbio header files.
...
Cleanup asic_reg/raven1/NBIO folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:25 -05:00
Feifei Xu
a146391bbb
drm/amd/include:cleanup raven1 mp header files.
...
Cleanup asic_reg/raven1/MP folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:25 -05:00
Feifei Xu
95c1f7aad2
drm/amd/include:cleanup raven1 mmhub header files.
...
Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:24 -05:00
Feifei Xu
5a18155d99
drm/amd/include:cleanup raven1 gc header files.
...
Cleanup asic_reg/raven1/GC folder. Remove unused files:
gc_9_1_default.h gc_9_1_sh_mask.h
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:24 -05:00
Feifei Xu
02cf8837d0
drm/amd/include:cleanup raven1 sdma header files.
...
Cleanup asic_reg/raven1/SDMA0 folder.Remove unused sdma0_4_1_sh_mask.h.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:23 -05:00
Feifei Xu
fb960bd283
drm/amd/include:cleanup vega10 header files.
...
Remove asic_reg/vega10 folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:22 -05:00
Feifei Xu
8af7454e7c
drm/amd/include:cleanup vega10 osssys header files.
...
Cleanup asic_reg/vega10/OSSSYS folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:22 -05:00
Feifei Xu
424d9bb4d5
drm/amd/include:cleanup vega10 smuio header files.
...
Cleanup asic_reg/vega10/SMUIO folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:21 -05:00
Feifei Xu
daad67b51e
drm/amd/include:cleanup vega10 nbif header files.
...
Cleanup asic_reg/vega10/NBIF folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:21 -05:00
Feifei Xu
f0a58aa3f2
drm/amd/include:cleanup vega10 nbio header files.
...
Cleanup asic_reg/vega10/NBIO folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:21 -05:00
Feifei Xu
65417d9f55
drm/amd/include:cleanup vega10 mmhub header files.
...
Cleanup asic_reg/vega10/MMHUB folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:20 -05:00
Feifei Xu
cde5c34f63
drm/amd/include:cleanup vega10 gc header files.
...
Cleanup asic_reg/vega10/GC folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:20 -05:00
Feifei Xu
18297a215b
drm/amd/include:cleanup vega10 vce header files.
...
Cleanup asic_reg/vega10/VCE folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:19 -05:00
Feifei Xu
5d735f83c2
drm/amd/include:cleanup vega10 uvd header files.
...
Cleanup asic_reg/vega10/UVD folder,remove unused uvd_7_0_default.h.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:19 -05:00
Feifei Xu
135d4b10d3
drm/amd/include:cleanup vega10 dce header files.
...
Cleanup asic_reg/vega10/DC folder.Remove dce_12_0_default.h.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:18 -05:00
Feifei Xu
90c7a9358f
drm/amd/include: cleanup vega10 umc header files.
...
Remove asic/vega10/UMC folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:18 -05:00
Feifei Xu
6ce682251d
drm/amd/include:cleanup vega10 athub header files.
...
Cleanup asic_reg/vega10/ATHUB folder,remove unused files.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:17 -05:00
Feifei Xu
a6651c98c6
drm/amd/include:cleanup vega10 mp header files.
...
Cleanup asic_reg/vega10/MP folder, remove mp_9_0_default.h
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:17 -05:00
Feifei Xu
75199b8c7f
drm/amd/include:cleanup vega10 hdp header files.
...
Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:16 -05:00
Feifei Xu
812f77b749
drm/amd/include:cleanup vega10 sdma0/1 header files.
...
To remove include/asic_reg/vega10 folder,create IP folders sdma0/1.
This patch cleanup asic_reg/vega10/SDMA folders.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:16 -05:00
Monk Liu
ce1b1b66cd
drm/amdgpu:partially revert 1cfd8e237f0318e330190ac21d63c58ae6a1f66c
...
found RING0 test fail after S3 resume regression, which is
introduced by 1cfd8e237f0318e330190ac21d63c58ae6a1f66c
Because after suspend VRAM will be cleared, so driver must
unpin the GART table(resident in VRAM) during suspend so it
can be evicted to system ram and must correspondingly pin it
during resume so the GART table could be restored to VRAM.
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:15 -05:00
Michel Dänzer
96b8af6eb4
drm/amd/display: Fix description of module parameter dc_log
...
It was incorrectly referencing the dc parameter, resulting in an empty
description of the dc_log parameter.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:06 -05:00
Michel Dänzer
43fbcde020
drm/amdgpu: Downgrade DRM_ERROR to DRM_DEBUG in amdgpu_queue_mgr_map
...
Prevent buggy userspace from spamming dmesg.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:06 -05:00
Christian König
5b565e0e5a
drm/amdgpu: expose the VA above the hole to userspace
...
Let userspace know how much area we have above the 48bit VA hole on
Vega10.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:05 -05:00
Christian König
4b7f0848c4
drm/amdgpu: use dev_dbg instead of dev_err in the VA IOCTL
...
Userspace buggy userspace can spam the logs.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:05 -05:00
Christian König
bb7939b203
drm/amdgpu: fix VA hole handling on Vega10 v3
...
Similar to the CPU address space the VA on Vega10 has a hole in it.
v2: use dev_dbg instead of dev_err
v3: add some more comments to explain how the hw works
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:05 -05:00
Christian König
6af046d26f
drm/amdgpu: use the new TTM bytes moved counter v2
...
Instead of the global statistics use the per context bytes moved counter.
v2: rebased
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de >
Tested-by: Michel Dänzer <michel.daenzer@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:04 -05:00
Christian König
dfb8fa9828
drm/amdgpu: forward operation context to ttm_bo_mem_space
...
This way we can finally use some more stats.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de >
Tested-by: Michel Dänzer <michel.daenzer@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:04 -05:00
Christian König
2823f4f019
drm/ttm: add context to driver move callback as well
...
Instead of passing the parameters manually.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de >
Tested-by: Michel Dänzer <michel.daenzer@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:03 -05:00
Christian König
c13c55d611
drm/ttm: use an operation context for ttm_bo_mem_space v2
...
Instead of specifying interruptible and no_wait_gpu manually.
v2: rebase
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de >
Tested-by: Michel Dänzer <michel.daenzer@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:02 -05:00
Christian König
6fead44a4c
drm/ttm: use an operation ctx for ttm_bo_init_reserved
...
Instead of specifying if sleeping should be interruptible.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de >
Tested-by: Michel Dänzer <michel.daenzer@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:02 -05:00
Christian König
19be557010
drm/ttm: add operation ctx to ttm_bo_validate v2
...
Give moving a BO into place an operation context to work with.
v2: rebased
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de >
Tested-by: Michel Dänzer <michel.daenzer@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:01 -05:00
Ernst Sjöstrand
8cdbad98c5
drm/amd/powerplay: Followup fixes to mc_reg_address
...
This is a followup to:
drm/amd/powerplay: Fix buffer overflows with mc_reg_address
Rework *_set_mc_special_registers for the other architectures to
use the same logic as the first patch. This allows the last entry
of the array to be filled without an error message for example.
This doesn't fix any known problems, perhaps avoided by luck.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:00 -05:00
Ernst Sjöstrand
47e8788b49
drm/amd/powerplay: Fix buffer overflows with mc_reg_address
...
Smatch warned about the following lines:
ci_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16
tonga_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16
Change the logic to check before access instead of after incrementing.
It's fine if j reaches max after we're done. This allows the last entry
of the array to be filled without an error message for example.
Changed some whitespace to clarify grouping.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:00 -05:00
Ernst Sjöstrand
7d0331007a
drm/amd/amdgpu: Fix missing null check in atombios_i2c.c
...
Reported by smatch:
amdgpu_atombios_i2c_process_i2c_ch() error: we previously assumed 'buf' could be null
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:47:59 -05:00
Christian König
235943189d
drm/amdgpu: fix VCE buffer placement restrictions v2
...
Turned out that VCE still has a placement restriction that BOs can't
cross a 4GB boundary.
Fix this by adding a command submission parser prepass to correctly
place the buffers.
v2: add function description
Signed-off-by: Christian König <christian.koenig@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:47:58 -05:00
Christian König
b98f1b9e5e
drm/amdgpu: align GTT start to 4GB v2
...
For VCE to work properly the start of the GTT space must be aligned to a
4GB boundary.
v2: add comment why we do this
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:47:58 -05:00