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813 Commits

Author SHA1 Message Date
Hillf Danton
5639bc4a64 MIPS: Hugetlb: Keep TLB cache hot while flushing 
If we only flush the TLB of the given huge page, the TLB cache remains hot
for the relevant mm as it is, and less will be refilled after flush, huge
or not.

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Cc: linux-mips@linux-mips.org
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/2860/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:45 +00:00
Thomas Bogendoerfer
e84de0c619 MIPS: GIO bus support for SGI IP22/28 
SGI IP22/IP28 machines have GIO busses for adding graphics and other
extension cards. This patch adds support for GIO driver/device
handling and converts the newport console driver to a GIO driver.

[ralf@linux-mips.org: Fixed build error caused by the modules.h -> export.h
changes.]

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
To: linux-fbdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2886/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:44 +00:00
David Daney
714c1f5c1a MIPS: Octeon: Update DMA mapping operations for OCTEON II processors. 
OCTEON II has a new dma to phys mapping method for PCIe.  Define
OCTEON_DMA_BAR_TYPE_PCIE2 to denote this case, and handle it.

OCTEON II also needs a swiotlb if the OHCI USB driver is enabled, so
allocate this too.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2983/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:29 +00:00
David Daney
26afc5e399 MIPS: Octeon: Update feature test functions for new chips and features. 
cvmx.h was rearranged to fix include file ordering problems, but there
is no change other than moving some definitions around.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2984/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:29 +00:00
David Daney
412394d104 MIPS: Octeon: Update SOC PCI related register definitions for new chips. 
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2986/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:29 +00:00
David Daney
37d3bfd992 MIPS: Octeon: Rearrange CVMX files in preperation for device tree 
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2941/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:29 +00:00
David Daney
ada11a339d MIPS: Octeon: Update bootloader board type constants. 
Many new types of boards exist, so lets recognize them.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2940/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:28 +00:00
David Daney
af866496c7 MIPS: Octeon: Move some Ethernet support files out of staging. 
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2942/
Patchwork: https://patchwork.linux-mips.org/patch/3012/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:28 +00:00
David Daney
751c9f6849 MIPS: Oceton: Update model detection code for new chips. 
Several newer chips were not covered, update the code to detect them.
This necessitates updating cvmx-mio-defs.h as well, because it has new
and required definitions.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2939/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:28 +00:00
David Daney
506d24be55 MIPS: Octeon: Update struct cvmx_bootinfo to v3. 
Bootloaders can pass version 3 of this structure.  Add the new fields
so we can support the Device Tree.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2938/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:28 +00:00
Kevin Cernekee
6fb97effee MIPS: Add board_ebase_setup() 
Some systems need to relocate the MIPS exception vector base during
trap initialization.  Add a hook to make this possible.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2959/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:18 +00:00
Kevin Cernekee
34bd92e27b MIPS: Add NMI notifier 
Allow the board support code to register a raw notifier callback for
NMI, similar to what is done for CU2 exceptions.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2958/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:18 +00:00
Kevin Cernekee
18a1eef92d MIPS: BMIPS: Introduce bmips.h 
bmips.h contains BMIPS definitions that are useful for SMP, vector
relocation, performance counters, etc.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2973/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:18 +00:00
Kevin Cernekee
020232f1ca MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operations 
Several BMIPS-specific CP0 registers are used for SMP boot and other
operations.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2956/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:18 +00:00
Kevin Cernekee
1c7c44519a MIPS: BMIPS: Add CFLAGS, Makefile entries for BMIPS 
Add CONFIG_CPU_BMIPS* in all of the right places, so that BMIPS kernel
images will compile and run.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2955/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:17 +00:00
Kevin Cernekee
15fb0a1509 MIPS: Clean up whitespace warning in hazards.h 
Use a tab on second and subsequent lines of multiline #if's, for
consistency with the next commit.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2954/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:17 +00:00
Florian Fainelli
92d9ae2026 MIPS: BCM63xx: Fix GPIO set/get for BCM6345 
On BCM6345, the register offsets for the set/get GPIO registers is wrong.
Use the same logic as the one present in arch/mips/bcm63xx/irq.c to
define the correct gpio_out_low_reg value when support for BCM6345
is compiled in.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3010/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:04 +00:00
Florian Fainelli
e1c96c8620 MIPS: BCM63xx: Remove BCM6345 hacks to read base boot address 
Though BCM6345 does not technically have the same MPI register layout
than the other SoCs, reading the chip-select registers is done the same
way, and particularly for chip-select 0, which is the boot flash.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3009/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:04 +00:00
Florian Fainelli
d61fcfe2bb MIPS: BCM63xx: Fix SDRAM size computation for BCM6345 
Instead of hardcoding the amount of available RAM, read the number of
effective multiples of 8MB from SDRAM_MBASE_REG.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3008/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:04 +00:00
Maxime Bizon
04712f3ff6 MIPS: BCM63XX: Add support for bcm6368 CPU. 
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:04 +00:00
Maxime Bizon
6224892c81 MIPS: BCM63XX: Add external irq support for non 6348 CPUs. 
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2899/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:04 +00:00
Maxime Bizon
015ce7d352 MIPS: BCM63XX: Introduce bcm_readq & bcm_writeq. 
Needed for upcoming 6368 CPU support.

[ralf@linux-mips.org: Changed function names as per Sergei's comments.]

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2896/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:03 +00:00
Maxime Bizon
37c42a741f MIPS: BCM63XX: Prepare irq code to handle different external irq hardware implementation. 
External irq only works for 6348, change code to prepare support of
other CPUs.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2895/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:03 +00:00
Maxime Bizon
f61cced993 MIPS: BCM63XX: Change irq code to prepare for per-cpu peculiarity. 
No functionnal change is introduced by this patch.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2894/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:03 +00:00
Maxime Bizon
d430b6c5e7 MIPS: BCM63XX: Add more register sets & missing register definitions. 
Needed for upcoming 6368 CPU support.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2893/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:03 +00:00
Maxime Bizon
ec68c5206a MIPS: BCM63XX: Cleanup cpu registers. 
Use preprocessor when possible to avoid duplicated and error-prone
code.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2897/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:03 +00:00
Maxime Bizon
455a503f4c MIPS: BCM63XX: Hook up plat_ioremap to intercept soc registers remapping. 
Internal SOC registers can be directly accessed, no need to waste a
TLB entry.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2890/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:03:02 +00:00
Gabor Juhos
34cfcd26bd MIPS: ath79: Add AR933x specific WMAC setup code 
The wireless MAC of the AR933x SoCs uses different base address, and
requires different setup code.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3030/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:48 +00:00
Gabor Juhos
be5f362320 MIPS: ath79: Store the SoC revision in a global variable 
Knowing the exact revision of the SoC is required to make runtime decisions
in various code paths.  We have determined the SoC revision already, so we
only need to store that in a global variable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3027/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:47 +00:00
Rene Bolldorf
4ff40d5a76 MIPS: Initial PCI support for Atheros 724x SoCs. 
[ralf@linux-mips.org: Fixed the odd formatting of all break statements.]

Signed-off-by: Rene Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3019/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:47 +00:00
Gabor Juhos
d57f341ba0 SERIAL: AR933X: Add driver for the built-in UART of the SoC 
This patch adds the driver for the built-in UART of the
Atheros AR933X SoCs.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: linux-serial@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2526/
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:46 +00:00
Gabor Juhos
c279b77596 MIPS: ath79: add AR933X specific USB platform device registration 
Also select the USB_ARCH_HAS_EHCI symbol in order to make the
EHCI driver available.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2527/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:46 +00:00
Gabor Juhos
fdfbcf4705 MIPS: ath79: add AR933X specific GPIO initialization 
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2524/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:46 +00:00
Gabor Juhos
54eed4c77c MIPS: ath79: Add AR933X specific IRQ initialization 
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2530/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:45 +00:00
Gabor Juhos
7ee15d8a28 MIPS: ath79: Add AR933X specific glue for ath79_device_reset_{set,clear} 
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2523/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:45 +00:00
Gabor Juhos
04225e1d22 MIPS: ath79: add AR933X specific clock init 
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2522/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:45 +00:00
Gabor Juhos
0bd3acdf7d MIPS: ath79: Add early printk support for the AR933X SoCs 
The AR933X SoCs are using a different UART, thus require
different code for early printk support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2521/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:45 +00:00
Gabor Juhos
6d1c8fde2d MIPS: ath79: add revision id for the AR933X SoCs 
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2538/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:45 +00:00
Gabor Juhos
7e98aa4639 MIPS: ath79: add common USB Host Controller device 
Add common platform_device and helper code to make the registration of
the built-in USB controllers easier on the board which are using them.
Also register the USB controller on the AP81 and PB44 boards.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2442/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:44 +00:00
Gabor Juhos
d2b4ac1e5d MIPS: ath79: Handle more MISC IRQs 
The AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller.
The patch adds support for them.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2440/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:44 +00:00
Gabor Juhos
2f8501b9b8 MIPS: ath79: Change number of available IRQs 
The status register of the miscellaneous interrupt controller is 32 bits
wide, but the actual value of NR_IRQS covers only 8 of them. Change
NR_IRQS in order to make all of those interrupt lines usable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2441/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:44 +00:00
Manuel Lauss
1c043f16a0 MIPS: Alchemy: Add RTC device to all devboards 
All Devboards can use the 32kHz counter as a RTC device.

Also delete the custom CMOS RTC header, which can be used for the
DS1693 on the PB1500.  But since it doesn't have a buffer battery
it is as useful as the on-chip RTC which I prefer.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2874/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:07 +00:00
Manuel Lauss
6f7c8623db MIPS: Alchemy: Merge PB1200 support into DB1200 code. 
The PB1200 is basically a DB1200 with additional MMC and camera sockets
and different base addresses for external hardware (CPLD, IDE, Net, NAND).

This patch implements the missing PB1200 features in DB1200 support code
and runtime board detection.

Tested on DB1200 only.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2880/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:07 +00:00
Manuel Lauss
a9b71a8f0f MIPS: Alchemy: move au1200fb global functions to platform data 
au1200fb calls 3 functions which have to be defined in board code.
Fix this ugliness with the introduction of platform_data.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-fbdev@vger.kernel.org
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2871/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:07 +00:00
Manuel Lauss
f869d42e58 MIPS: Alchemy: Improved DB1550 support, with audio and serial busses. 
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2868/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:06 +00:00
Manuel Lauss
64cd04d0cf MIPS: Alchemy: Basic support for the DB1300 board. 
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2867/
Patchwork: https://patchwork.linux-mips.org/patch/2919/
Patchwork: https://patchwork.linux-mips.org/patch/2928/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:06 +00:00
Manuel Lauss
809f36c6f4 MIPS: Alchemy: Au1300 SoC support 
Add basic support for the Au1300 variant(s):
- New GPIO/Interrupt controller
- DBDMA ids
- USB setup
- MMC support
- enable various PSC drivers
- detection code.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2866/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:05 +00:00
Manuel Lauss
3f724080a3 MIPS: Alchemy: remove PB1000 support 
Noone seems to have test hardware or care anymore.  Drop PB1000 support
and along with it the old Alchemy PCMCIA socket driver.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: linux-pcmcia@lists.infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/2881/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:02:05 +00:00
Ralf Baechle
3d18c98367 MIPS: Fix Jazz 64-bit build error. 
Move add_wired_entry to its own header file from where it will be
always included.  Patch up other users of add_wired_entry to also include
the header as needed.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2011-12-07 22:01:45 +00:00
Tejun Heo
d88e4cb671 freezer: remove now unused TIF_FREEZE 
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: linux-arch@vger.kernel.org
 2011-11-21 12:32:25 -08:00