The functions flush_user_dcache_range() and flush_user_icache_range()
are only used by the parisc signal handling code. This code only needs
to flush a couple of lines, so the threshold check is unnecessary
overhead.
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
We want to do a pr_cont() here and not a pr_warn().
Fixes: b391667eb4 ("parisc: Report trap type as human readable string")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Helge Deller <deller@gmx.de>
Define access_ok() as macro instead of static function. This fixes build
warnings in code where the second parameter is given as unsigned long.
Signed-off-by: Helge Deller <deller@gmx.de>
These are the current source files that should not have
executable attributes set.
[ Normally this would be sent through Andrew Morton's tree
but his quilt tools don't like permission only patches. ]
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Merge more updates from Andrew Morton:
- almost all of the rest of MM
- misc bits
- KASAN updates
- procfs
- lib/ updates
- checkpatch updates
* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (124 commits)
checkpatch: remove false unbalanced braces warning
checkpatch: notice unbalanced else braces in a patch
checkpatch: add another old address for the FSF
checkpatch: update $logFunctions
checkpatch: warn on logging continuations
checkpatch: warn on embedded function names
lib/lz4: remove back-compat wrappers
fs/pstore: fs/squashfs: change usage of LZ4 to work with new LZ4 version
crypto: change LZ4 modules to work with new LZ4 module version
lib/decompress_unlz4: change module to work with new LZ4 module version
lib: update LZ4 compressor module
lib/test_sort.c: make it explicitly non-modular
lib: add CONFIG_TEST_SORT to enable self-test of sort()
rbtree: use designated initializers
linux/kernel.h: fix DIV_ROUND_CLOSEST to support negative divisors
lib/find_bit.c: micro-optimise find_next_*_bit
lib: add module support to atomic64 tests
lib: add module support to glob tests
lib: add module support to crc32 tests
kernel/ksysfs.c: add __ro_after_init to bin_attribute structure
...
This patch adds a new API to indicate S0ix residency in usec. It utilizes
the PMC Global Control Registers (GCR) to read deep and shallow
S0ix residency.
PMC MMIO resources:
o Lower 4kB: IPC1 (PMC inter-processor communication) interface
o Upper 4kB: GCR (Global Control Registers)
This enables the power management framework to take corrective actions when
the platform fails to enter S0ix after kernel freeze as part of the suspend
to idle flow. (echo freeze > /sys/power/state).
This is expected to be used with a S0ix failsafe framework such as:
<https://lwn.net/Articles/689505/>
[rajneesh: folded in "fix division in 32-bit case" from Andy Shevchenko]
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
Signed-off-by: Shanth Murthy <shanth.murthy@intel.com>
[andy: fixed kbuild error, removed "total" from variables, fixed macro]
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Pull OpenRISC updates from Stafford Horne:
"Highlights include:
- optimized memset and memcpy routines, ~20% boot time saving
- support for cpu idling
- adding support for l.swa and l.lwa atomic operations (in spec from
2014)
- use atomics to implement: bitops, cmpxchg, futex
- the atomics are in preparation for SMP support"
* tag 'openrisc-for-linus' of git://github.com/openrisc/linux: (25 commits)
openrisc: head: Init r0 to 0 on start
openrisc: Export ioremap symbols used by modules
arch/openrisc/lib/memcpy.c: use correct OR1200 option
openrisc: head: Remove unused strings
openrisc: head: Move init strings to rodata section
openrisc: entry: Fix delay slot detection
openrisc: entry: Whitespace and comment cleanups
scripts/checkstack.pl: Add openrisc support
MAINTAINERS: Add the openrisc official repository
openrisc: Add .gitignore
openrisc: Add optimized memcpy routine
openrisc: Add optimized memset
openrisc: Initial support for the idle state
openrisc: Fix the bitmask for the unit present register
openrisc: remove unnecessary stddef.h include
openrisc: add futex_atomic_* implementations
openrisc: add optimized atomic operations
openrisc: add cmpxchg and xchg implementations
openrisc: add atomic bitops
openrisc: add l.lwa/l.swa emulation
...
A new unit test for the device-dax 1GB enabling currently fails with
this warning before hanging the test thread:
WARNING: CPU: 0 PID: 21 at lib/percpu-refcount.c:155 percpu_ref_switch_to_atomic_rcu+0x1e3/0x1f0
percpu ref (dax_pmem_percpu_release [dax_pmem]) <= 0 (0) after switching to atomic
[..]
CPU: 0 PID: 21 Comm: rcuos/1 Tainted: G O 4.10.0-rc7-next-20170207+ #944
[..]
Call Trace:
dump_stack+0x86/0xc3
__warn+0xcb/0xf0
warn_slowpath_fmt+0x5f/0x80
? rcu_nocb_kthread+0x27a/0x510
? dax_pmem_percpu_exit+0x50/0x50 [dax_pmem]
percpu_ref_switch_to_atomic_rcu+0x1e3/0x1f0
? percpu_ref_exit+0x60/0x60
rcu_nocb_kthread+0x339/0x510
? rcu_nocb_kthread+0x27a/0x510
kthread+0x101/0x140
The get_user_pages() path needs to arrange for references to be taken
against the dev_pagemap instance backing the pud mapping. Refactor the
existing __gup_device_huge_pmd() to also account for the pud case.
Link: http://lkml.kernel.org/r/148653181153.38226.9605457830505509385.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Jiang <dave.jiang@intel.com>
Cc: Matthew Wilcox <mawilcox@microsoft.com>
Cc: Ross Zwisler <ross.zwisler@linux.intel.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Nilesh Choudhury <nilesh.choudhury@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Pull sparc updates from David Miller:
1) Support multiple huge page sizes, from Nitin Gupta.
2) Improve boot time on large memory configurations, from Pavel
Tatashin.
3) Make BRK handling more consistent and documented, from Vijay Kumar.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
sparc64: Fix build error in flush_tsb_user_page
sparc64: memblock resizes are not handled properly
sparc64: use latency groups to improve add_node_ranges speed
sparc64: Add 64K page size support
sparc64: Multi-page size support
Documentation/sparc: Steps for sending break on sunhv console
sparc64: Send break twice from console to return to boot prom
sparc64: Migrate hvcons irq to panicked cpu
sparc64: Set cpu state to offline when stopped
sunvdc: Add support for setting physical sector size
sparc64: fix for user probes in high memory
sparc: topology_64.h: Fix condition for including cpudata.h
sparc32: mm: srmmu: add __ro_after_init to sparc32_cachetlb_ops structures
Originally openrisc spec 0 specified that r0 would be wired to ground.
This is no longer the case. r0 is not guaranteed to be 0 at init, so we
need to initialize it to 0 before using it.
Also, if we are clearing r0 we cant use r0 to clear itself. Change the
the CLEAR_GPR macro to use movhi for clearing.
Reported-by: Jakob Viketoft <jakob.viketoft@aacmicrotec.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Noticed this when building with allyesconfig. Got build failures due
to iounmap and __ioremap symbols missing. This patch exports them so
modules can use them. This is inline with other architectures.
Signed-off-by: Stafford Horne <shorne@gmail.com>
These string definitions are no longer used removed them. Noticed this
while working on a CONFIG_DEBUG_INFO build issue.
Signed-off-by: Stafford Horne <shorne@gmail.com>
The strings used during the head/init phase of openrisc bootup were
stored in the executable section of the binary.
This causes compilation to fail when using CONFIG_DEBUG_INFO with
error:
Error: unaligned opcodes detected in executable segment
Signed-off-by: Stafford Horne <shorne@gmail.com>
Use execption SR stored in pt_regs for detection, the current SR is not
correct as the handler is running after return from exception.
Also, The code that checks for a delay slot uses a flag bitmask and then
wants to check if the result is not zero. The test it implemented was
wrong.
Correct it by changing the test to check result against non zero.
Signed-off-by: Stafford Horne <shorne@gmail.com>
Cleanups to whitespace and add some comments. Reading through the delay
slot logic I noticed some things:
- Delay slot instructions were not indented
- Some comments are not lined up
- Use tabs and spaces consistent with other code
No functional change
Signed-off-by: Stafford Horne <shorne@gmail.com>
The generic memcpy routine provided in kernel does only byte copies.
Using word copies we can lower boot time and cycles spend in memcpy
quite significantly.
Booting on my de0 nano I see boot times go from 7.2 to 5.6 seconds.
The avg cycles in memcpy during boot go from 6467 to 1887.
I tested several algorithms (see code in previous patch mails)
The implementations I tested and avg cycles:
- Word Copies + Loop Unrolls + Non Aligned 1882
- Word Copies + Loop Unrolls 1887
- Word Copies 2441
- Byte Copies + Loop Unrolls 6467
- Byte Copies 7600
In the end I ended up going with Word Copies + Loop Unrolls as it
provides best tradeoff between simplicity and boot speedups.
Signed-off-by: Stafford Horne <shorne@gmail.com>
This adds a hand-optimized assembler version of memset and sets
__HAVE_ARCH_MEMSET to use this version instead of the generic C
routine
Signed-off-by: Olof Kindgren <olof.kindgren@gmail.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
This patch adds basic support for the idle state of the cpu.
The patch overrides the regular idle function, enables the interupts,
checks for the power management unit and enables the cpu doze mode
if available.
Signed-off-by: Sebastian Macke <sebastian@macke.de>
[shorne@gmail.com: Fixed checkpatch, blankline after declarations]
Signed-off-by: Stafford Horne <shorne@gmail.com>
The bits were swapped, as per spec and processor implementation the
power management present bit is 9 and PIC bit is 8. This patch brings
the definitions into spec.
Signed-off-by: Sebastian Macke <sebastian@macke.de>
[shorne@gmail.com: Added commit body]
Signed-off-by: Stafford Horne <shorne@gmail.com>
Support for the futex_atomic_* operations by using the
load-link/store-conditional l.lwa/l.swa instructions.
Most openrisc cores provide these instructions now if not available,
emulation is provided.
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
[shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by
Alan Cox https://lkml.org/lkml/2014/7/23/666]
Signed-off-by: Stafford Horne <shorne@gmail.com>
Optimized version that make use of the l.lwa and l.swa atomic instruction
pair.
Most openrisc cores provide these instructions now, if not available
emulation is provided.
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
[shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by
Alan Cox https://lkml.org/lkml/2014/7/23/666]
[shorne@gmail.com: fixed unused calculated value compiler warning in
define cmpxchg]
Signed-off-by: Stafford Horne <shorne@gmail.com>
This utilize the load-link/store-conditional l.lwa and l.swa
instructions to implement the atomic bitops.
When those instructions are not available emulation is provided.
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
[shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by
Alan Cox https://lkml.org/lkml/2014/7/23/666, implement
test_and_change_bit]
Signed-off-by: Stafford Horne <shorne@gmail.com>
Patch "sparc64: Add 64K page size support"
unconditionally used __flush_huge_tsb_one_entry()
which is available only when hugetlb support is
enabled.
Another issue was incorrect TSB flushing for 64K
pages in flush_tsb_user().
Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When we're updating a register's sys_val, we use arm64_ftr_value() to
find the new field value. We use cpuid_feature_extract_field() to find
the new value, but this implicitly assumes a 4-bit field, so we may
extract more bits than we mean to for fields like CTR_EL0.L1ip.
This affects update_cpu_ftr_reg(), where we may extract erroneous values
for ftr_cur and ftr_new. Depending on the additional bits extracted in
either case, we may erroneously detect that the value is mismatched, and
we'll try to compute a new safe value.
Dependent on these extra bits and feature type, arm64_ftr_safe_value()
may pessimistically select the always-safe value, or may erroneously
choose either the extracted cur or new value as the safe option. The
extra bits will subsequently be masked out in arm64_ftr_set_value(), so
we may choose a higher value, yet write back a lower one.
Fix this by passing the width down explicitly in arm64_ftr_value(), so
we always extract the correct amount.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This reverts commit 0bfc445dec.
When we change the permissions of regions mapped using contiguous
entries, the architecture requires us to follow a Break-Before-Make
strategy, breaking *all* associated entries before we can change any of
the following properties from the entries:
- presence of the contiguous bit
- output address
- attributes
- permissiones
Failure to do so can result in a number of problems (e.g. TLB conflict
aborts and/or erroneous results from TLB lookups).
See ARM DDI 0487A.k_iss10775, "Misprogramming of the Contiguous bit",
page D4-1762.
We do not take this into account when altering the permissions of kernel
segments in mark_rodata_ro(), where we change the permissions of live
contiguous entires one-by-one, leaving them transiently inconsistent.
This has been observed to result in failures on some fast model
configurations.
Unfortunately, we cannot follow Break-Before-Make here as we'd have to
unmap kernel text and data used to perform the sequence.
For the timebeing, revert commit 0bfc445dec so as to avoid issues
resulting from this misuse of the contiguous bit.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reported-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <Will.Deacon@arm.com>
Cc: stable@vger.kernel.org # v4.10
Signed-off-by: Will Deacon <will.deacon@arm.com>
Commit 38fd94b027 ("arm64: Work around Falkor erratum 1003") tried to
work around a hardware erratum, but actually caused a system crash of
its own during switch_mm:
cpu_do_switch_mm+0x20/0x40
efi_virtmap_load+0x34/0x40
virt_efi_get_next_variable+0x64/0xc8
efivar_init+0x8c/0x348
efisubsys_init+0xd4/0x270
do_one_initcall+0x80/0x110
kernel_init_freeable+0x19c/0x240
kernel_init+0x10/0x100
ret_from_fork+0x10/0x50
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
In cpu_do_switch_mm, x1 contains the mm_struct pointer, which needs to
be preserved by the pre_ttbr0_update_workaround macro rather than passed
as a temporary.
This patch clobbers x2 and x3 instead, keeping the mm_struct intact
after the workaround has run.
Fixes: 38fd94b027 ("arm64: Work around Falkor erratum 1003")
Tested-by: Manoj Iyer <manoj.iyer@canonical.com>
Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The BUG() macro's use of __builtin_unreachable() via the unreachable()
macro tells gcc that the instruction is a dead end, and that it's safe
to assume the current code path will not execute past the previous
instruction.
On x86, the BUG() macro is implemented with the 'ud2' instruction. When
objtool's branch analysis sees that instruction, it knows the current
code path has come to a dead end.
Peter Zijlstra has been working on a patch to change the WARN macros to
use 'ud2'. That patch will break objtool's assumption that 'ud2' is
always a dead end.
Generally it's best for objtool to avoid making those kinds of
assumptions anyway. The more ignorant it is of kernel code internals,
the better.
So create a more generic way for objtool to detect dead ends by adding
an annotation to the unreachable() macro. The annotation stores a
pointer to the end of the unreachable code path in an '__unreachable'
section. Objtool can read that section to find the dead ends.
Tested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/41a6d33971462ebd944a1c60ad4bf5be86c17b77.1487712920.git.jpoimboe@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Return a sensible value if TASK_SIZE if called from a kernel thread.
This gets us around an issue with copy_mount_options that does a magic
size calculation "TASK_SIZE - (unsigned long)data" while in a kernel
thread and data pointing to kernel space.
Cc: <stable@vger.kernel.org>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This patch introduces a new in-kernel-crypto blockcipher
called 'paes' which implements AES with protected keys.
The paes blockcipher can be used similar to the aes
blockcipher but uses secure key material to derive the
working protected key and so offers an encryption
implementation where never a clear key value is exposed
in memory.
The paes module is only available for the s390 platform
providing a minimal hardware support of CPACF enabled
with at least MSA level 3. Upon module initialization
these requirements are checked.
Includes additional contribution from Harald Freudenberger.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Pull drm updates from Dave Airlie:
"This is the main drm pull request for v4.11.
Nothing too major, the tinydrm and mmu-less support should make
writing smaller drivers easier for some of the simpler platforms, and
there are a bunch of documentation updates.
Intel grew displayport MST audio support which is hopefully useful to
people, and FBC is on by default for GEN9+ (so people know where to
look for regressions). AMDGPU has a lot of fixes that would like new
firmware files installed for some GPUs.
Other than that it's pretty scattered all over.
I may have a follow up pull request as I know BenH has a bunch of AST
rework and fixes and I'd like to get those in once they've been tested
by AST, and I've got at least one pull request I'm just trying to get
the author to fix up.
Core:
- drm_mm reworked
- Connector list locking and iterators
- Documentation updates
- Format handling rework
- MMU-less support for fbdev helpers
- drm_crtc_from_index helper
- Core CRC API
- Remove drm_framebuffer_unregister_private
- Debugfs cleanup
- EDID/Infoframe fixes
- Release callback
- Tinydrm support (smaller drivers for simple hw)
panel:
- Add support for some new simple panels
i915:
- FBC by default for gen9+
- Shared dpll cleanups and docs
- GEN8 powerdomain cleanup
- DMC support on GLK
- DP MST audio support
- HuC loading support
- GVT init ordering fixes
- GVT IOMMU workaround fix
amdgpu/radeon:
- Power/clockgating improvements
- Preliminary SR-IOV support
- TTM buffer priority and eviction fixes
- SI DPM quirks removed due to firmware fixes
- Powerplay improvements
- VCE/UVD powergating fixes
- Cleanup SI GFX code to match CI/VI
- Support for > 2 displays on 3/5 crtc asics
- SI headless fixes
nouveau:
- Rework securre boot code in prep for GP10x secure boot
- Channel recovery improvements
- Initial power budget code
- MMU rework preperation
vmwgfx:
- Bunch of fixes and cleanups
exynos:
- Runtime PM support for MIC driver
- Cleanups to use atomic helpers
- UHD Support for TM2/TM2E boards
- Trigger mode fix for Rinato board
etnaviv:
- Shader performance fix
- Command stream validator fixes
- Command buffer suballocator
rockchip:
- CDN DisplayPort support
- IOMMU support for arm64 platform
imx-drm:
- Fix i.MX5 TV encoder probing
- Remove lower fb size limits
msm:
- Support for HW cursor on MDP5 devices
- DSI encoder cleanup
- GPU DT bindings cleanup
sti:
- stih410 cleanups
- Create fbdev at binding
- HQVDP fixes
- Remove stih416 chip functionality
- DVI/HDMI mode selection fixes
- FPS statistic reporting
omapdrm:
- IRQ code cleanup
dwi-hdmi bridge:
- Cleanups and fixes
adv-bridge:
- Updates for nexus
sii8520 bridge:
- Add interlace mode support
- Rework HDMI and lots of fixes
qxl:
- probing/teardown cleanups
ZTE drm:
- HDMI audio via SPDIF interface
- Video Layer overlay plane support
- Add TV encoder output device
atmel-hlcdc:
- Rework fbdev creation logic
tegra:
- OF node fix
fsl-dcu:
- Minor fixes
mali-dp:
- Assorted fixes
sunxi:
- Minor fix"
[ This was the "fixed" pull, that still had build warnings due to people
not even having build tested the result. I'm not a happy camper
I've fixed the things I noticed up in this merge. - Linus ]
* tag 'drm-for-v4.11-less-shouty' of git://people.freedesktop.org/~airlied/linux: (1177 commits)
lib/Kconfig: make PRIME_NUMBERS not user selectable
drm/tinydrm: helpers: Properly fix backlight dependency
drm/tinydrm: mipi-dbi: Fix field width specifier warning
drm/tinydrm: mipi-dbi: Silence: ‘cmd’ may be used uninitialized
drm/sti: fix build warnings in sti_drv.c and sti_vtg.c files
drm/amd/powerplay: fix PSI feature on Polars12
drm/amdgpu: refuse to reserve io mem for split VRAM buffers
drm/ttm: fix use-after-free races in vm fault handling
drm/tinydrm: Add support for Multi-Inno MI0283QT display
dt-bindings: Add Multi-Inno MI0283QT binding
dt-bindings: display/panel: Add common rotation property
of: Add vendor prefix for Multi-Inno
drm/tinydrm: Add MIPI DBI support
drm/tinydrm: Add helper functions
drm: Add DRM support for tiny LCD displays
drm/amd/amdgpu: post card if there is real hw resetting performed
drm/nouveau/tmr: provide backtrace when a timeout is hit
drm/nouveau/pci/g92: Fix rearm
drm/nouveau/drm/therm/fan: add a fallback if no fan control is specified in the vbios
drm/nouveau/hwmon: expose power_max and power_crit
..
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs.
A handful of driver changes this time around. The larger changes are:
- Reset drivers for hi3660 and zx2967
- AHCI driver for Davinci, acked by Tejun and brought in here due to
platform dependencies
- Cleanups of atmel-ebi (External Bus Interface)
- Tweaks for Rockchip GRF (General Register File) usage (kitchensink
misc register range on the SoCs)
- PM domains changes for support of two new ZTE SoCs (zx296718 and
zx2967)"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
soc: samsung: pmu: Add register defines for pad retention control
reset: make zx2967 explicitly non-modular
reset: core: fix reset_control_put
soc: samsung: pm_domains: Read domain name from the new label property
soc: samsung: pm_domains: Remove message about failed memory allocation
soc: samsung: pm_domains: Remove unused name field
soc: samsung: pm_domains: Use full names in subdomains registration log
sata: ahci-da850: un-hardcode the MPY bits
sata: ahci-da850: add a workaround for controller instability
sata: ahci: export ahci_do_hardreset() locally
sata: ahci-da850: implement a workaround for the softreset quirk
sata: ahci-da850: add device tree match table
sata: ahci-da850: get the sata clock using a connection id
soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register
memory: atmel-ebi: Enable the SMC clock if specified
soc: samsung: pmu: Remove unused and duplicated defines
memory: atmel-ebi: Properly handle multiple reference to the same CS
memory: atmel-ebi: Fix the test to enable generic SMC logic
soc: samsung: pm_domains: Add new Exynos5433 compatible
soc: samsung: pmu: Add dummy support for Exynos5433 SoC
...
Pull ARM 64-bit DT updates from Arnd Bergmann:
"ARM64 DT updates are fairly small this time, only two new SoCs and a
handful of new machines get added, all of them similar to other
hardware we already support.
New SoC:
- HiSilicon Kirin960/Hi3660 and HiKey960 development board
- NXP LS1012a with three reference boards:
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A
New development board:
- Banana Pi M64, based on Allwinner A64:
http://www.banana-pi.org/m64.html
- SolidRun MACCHIATOBin based on Marvell Armada 8K:
https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/
- Broadcom BCM958712DxXMC NorthStar2 reference board (another one)
A lot of platforms improve support for existing machines by adding
extra devices for which a binding and driver is availabe:
Allwinner:
- MMC, USB
ARM Juno:
- Coresight, STM
Broadcom:
- NS2 GICv2m irqchip and PCIe
Marvell:
- Armada 3700 SPI, I2C, ethernet switch
Mediatek:
- MT8173 thermal
NXP i.MX:
- LS1046A thermal
Qualcomm:
- coresight on MSM8916, HDMI, WCNSS, SCM
Renesas:
- r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd
Rockchip:
- thermal, eDP, pinctrl enhancements
Samsung:
- TM2 touchkey, Exynos5433 HDMI and power management improvements
UniPhier:
- SD reset, eMMC controller
ZTE:
- oppv2 cpufreq"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (110 commits)
arm64: dts: qcom: Add msm8916 CoreSight components
arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon
arm64: allwinner: add BananaPi-M64 support
arm64: allwinner: a64: add UART1 pin nodes
arm64: allwinner: pine64: add MMC support
arm64: allwinner: a64: Increase the MMC max frequency
arm64: allwinner: a64: Add MMC pinctrl nodes
arm64: allwinner: a64: Add MMC nodes
dt-bindings: clockgen: Add compatible string for LS1012A
Documentation: DT: add LS1012A compatible for SCFG and DCFG
Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards
arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
arm64: tegra: Use symbolic reset identifiers
arm64: dts: r8a7796: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: Mark EthernetAVB device node disabled
arm64: dts: r8a7795: tidyup audma definition order
arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
arm64: dts: r8a7796: Add R-Car Gen3 thermal support
arm64: dts: r8a7795: Add R-Car Gen3 thermal support
...
Pull ARM DT updates from Arnd Bergmann:
"A total of 380 patches this time, mostly adding support for more
hardware in the device tree descriptions. There is not much exciting
here for 4.11, but I've tried my best to condense the information from
the pull requests I got into a readable summary.
Noteworthy changes to existing platforms include:
- The GIC memory map was a bit wrong almost everywhere and now gets
fixed up
- The Allwinner platforms convert to the generic pinmux properties
- The Marvell EBU platforms now use the new DSA binding
- Samsung Exynos4212 was unused and gets removed
- The Renesas power management got improved
New production machines:
- Lego Mindstorms EV3:
https://www.lego.com/en-us/mindstorms/about-ev3
- Beelink X2 Android media box:
http://linux-sunxi.org/Beelink_X2
- "Romulus" baseboard management controller for OpenPower
- Axentia TSE-850 Data Radio Channel (DARC) encoder:
http://www.axentia.se/db/equipment.html
- Luxul XAP-1410 and XWR-1200 wireless access points:
https://luxul.com/xap-1410
New SoCs:
- Allwinner H2+ and V3s, both minor variations of already supported
chips:
http://www.allwinnertech.com/index.php?c=product&a=index&id=38
- Marvell Prestera DX packet processors based on Armada XP
architecture:
http://www.marvell.com/switching/prestera-dx/
- Samsung Exynos4412 Prime gets added, a minor variation of
Exynos4412
New developer and reference boards:
- Lichee Pi One, Lichee Pi Zero and Orange Pi Zero, all based on
Allwinner SoCs:
http://linux-sunxi.org/LicheePi_One
http://www.orangepi.org/orangepizero/
- SAMA5d36ek Reference platform:
http://www.atmel.com/tools/sama5d36-ek.aspx
- Beaglebone Green Wireless and Black Wireless:
https://beagleboard.org/black-wireless
https://beagleboard.org/green-wireless
- phyCORE-AM335x System on Module:
http://phytec.com/products/system-on-modules/phycore/am335x/
- New revision of "vf610-zii" Zodiac Inflight Innovations board
- Various i.MX System-on-Module: Is.IoT MX6UL, SavageBoard, Engicam
i.Core:
http://www.opossom.com/english/index.html
http://www.savageboard.org/
http://www.engicam.com/en/products/embedded/som/sodimm/is-iot-mx6ul
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q
- Liebherr (LWN) monitor 6 based on i.MX6 Quad, no idea what this is
- Cleanups and bugfixes on at91, bcm53xx, i.MX, mvebu, omap, oxnas,
qcom, rockchip, sti, stm32 and tegra
New device supports added to some boards and SoCs, briefly by platform:
- Allwinner: SPDIF, A33 cpufreq, A33 Mali GPU
- Aspeed: network, ipmi bt, gpio, pinmux
- Broadcom: video encoder for raspberry pi, qspi, ethernet, sd/mmc
- TI DaVinci: gpio, lcdc, usb, video-in, uart
- TI Keystone 2: MSM RAM, power/reset, uart
- Mediatek MT2701: clocks, iommu, spi, nand, adc, thermal
- Marvell EBU: ethernet switch on Turris Omnia
- NXP i.MX: otp ram, USB, wifi, bluetooth, spdif, spi, pmic, eeprom,
mmc, nand
- TI OMAP:
- Qualcomm: coresight, gyro/accelerometer, hdmi
- Renesas: pmic, soc-id
- Rockchip: qos
- Samsung: audio on Odroid-X
- Socfpga: FPGA manager, i2c, led, can, watchdog, nand, power monitor
- STi: video in/out
- STM32: timer, pwm, i2c, rtc, add, i2s
- NVIDIA Tegra: tpm
- Uniphier: mmc/sd pinmux"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (380 commits)
ARM: dts: armada-385-linksys: fix DSA compatible property
ARM: dts: Fix typo in armada-xp-98dx4251
ARM: DTS: Fix register map for virt-capable GIC
dt-bindings: arm,gic: Fix binding example for a virt-capable GIC
ARM: dts: sun8i: sinlinx: Enable audio nodes
ARM: dts: sun8i: parrot: Enable audio nodes
ARM: dts: sun8i: Add audio codec, dai and card for A33
ARM: dts: Add EMAC AXI settings for Arria10
ARM: dts: am335x-chiliboard: Support charger
ARM: dts: am335x-chiliboard: Support power button
ARM: sun8i: dt: Add mali node
dt-bindings: gpu: Add Mali Utgard bindings
ARM: dts: stm32: Add I2C1 support for STM32429 eval board
ARM: dts: stm32: Add I2C1 support for STM32F429 SoC
ARM: dts: stm32: Use clock DT binding definition on stm32f429 family
dt-bindings: mfd: stm32f4: Add missing binding definition
dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco
ARM: dts: stm32: add Timers driver for stm32f429 MCU
ARM: dts: add the AB8500 sysclk to the device trees
...
Pull ARM SoC defconfig updates from Arnd Bergmann:
"Defconfig additions, removals, etc. Almost all of them just turn on
drivers that we want on some platform, usually after the driver has
been merged into mainline.
There is now a new defconfig file for tango4"
* tag 'armsoc-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits)
ARM: multi_v7_defconfig: enable pstore configs
ARM: multi_v7_defconfig: enable some newly added crypto modules
ARM: davinci_all_defconfig: enable SATA modules
arm64: defconfig: enable CONFIG_MTD_NAND and CONFIG_MTD_NAND_DENALI_DT
arm64: defconfig: enable CONFIG_MTD_BLOCK
ARM: Import tango4_defconfig
ARM: omap2plus_defconfig: Enable support for RTC M41T80
ARM: omap2plus_defconfig: Enable support for micrell phys
ARM: vf610m4: defconfig: enable EXT4 filesystem
ARM: omap2plus_defconfig: Fix probe errors on UARTs 5 and 6
arm64: defconfig: Enable NUMA and NUMA_BALANCING
arm64: defconfig: enable SMMUv3 config
ARM: davinci_all_defconfig: enable iio
ARM: Keystone: Enable ARCH_HAS_RESET_CONTROLLER
ARM: configs: stm32: Add RTC support in STM32 defconfig
ARM: defconfig: qcom: add APQ8060 DragonBoard devices
ARM: qcom_defconfig: enable thermal sensors
ARM: qcom_defconfig: add ahci configs
ARM: qcom_defconfig: add pcie and atl1c ethernet configs
ARM: qcom_defconfig: add usb related configs
...
