This patch fixes the build error when ARCH_TEGRA_114_SOC is enabled
and ARCH_TEGRA_3x_SOC is disabled.
This provides Tegra114 with its own tegra114_init_early() instead of
making use of tegra30_init_early() so that T114 build doesn't depend
on T3x anymore.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
From Stephen Warren:
ARM: tegra: Common Clock Framework rework
Tegra already supports the common clock framework, but had issues:
1) The clock driver was located in arch/arm/mach-tegra/ rather than
drivers/clk/.
2) A single "Tegra clock" type was implemented, rather than separate
clock types for PLL, mux, divider, ... type in HW.
3) Clock lookups by device drivers were still driven by device name
and connection ID, rather than through device tree.
This pull request solves all three issues. This required some DT changes
to add clocks properties, and driver changes to request clocks more
"correctly". Finally, this rework allows all AUXDATA to be removed from
Tegra board files, and various duplicate clock lookup entries to be
removed from the driver.
This pull request is based on the previous pull request, with tag
tegra-for-3.9-cleanup.
* tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (31 commits)
clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s
clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s
ARM: tegra30: remove auxdata
ARM: tegra20: remove auxdata
ASoC: tegra: remove auxdata
staging: nvec: remove use of clk_get_sys
ARM: tegra: paz00: add clock information to DT
ARM: tegra: add clock properties to Tegra30 DT
ARM: tegra: add clock properties to Tegra20 DT
spi: tegra: do not use clock name to get clock
ARM: tegra: remove legacy clock code
ARM: tegra: migrate to new clock code
clk: tegra: add clock support for Tegra30
clk: tegra: add clock support for Tegra20
clk: tegra: add Tegra specific clocks
ARM: tegra: define Tegra30 CAR binding
ARM: tegra: define Tegra20 CAR binding
ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h
ARM: tegra: add function to read chipid
ARM: tegra: fix compile error when disable CPU_IDLE
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/board-dt-tegra30.c
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/platsmp.c
drivers/clocksource/Makefile
Migrate Tegra clock support to drivers/clk/tegra, this involves
moving:
1. definition of tegra_cpu_car_ops to clk.c
2. definition of reset functions to clk-peripheral.c
3. change parent of cpu clock.
4. Remove legacy clock initialization.
5. Initialize clocks using DT.
6. Remove all instance of mach/clk.h
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: use to_clk_periph_gate().]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The reset handler code is used for either UP or SMP. To make Tegra device
can compile for UP. It needs to be moved to another file that is not SMP
only. This is because the reset handler also be needed by CPU idle
"powered-down" mode. So we also need to put the reset handler init function
in non-SMP only and init them always.
And currently the implementation of the reset handler to know which CPU is
OK to bring up was identital with "cpu_present_mask". But the
"cpu_present_mask" did not initialize yet when the reset handler init
function was moved to init early function. We use the "cpu_possible_mask"
to replace "cpu_present_mask". Then it can work on both UP and SMP case.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
[swarren: dropped the move of v7_invalidate_l1() from one file to another,
to avoid conflicts with Pavel's cleanup of this function, adjust Makefile
so each line only contains 1 file.]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: fixes for 3.8
This branch contains a few miscellaneous fixes that have shown up in the
last few weeks.
By Sivaram Nair (2) and Hiroshi Doyu (1)
via Stephen Warren
* tag 'tegra-for-3.8-fixes-for-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
amba: tegra-ahb: Fix warning w/o PM_SLEEP
ARM: tegra: fix comment in dsib clk set_parent
ARM: tegra: select correct parent clk for pll_p
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull ARM SoC multiplatform conversion patches from Olof Johansson:
"Here are more patches in the progression towards multiplatform, sparse
irq conversions in particular.
Tegra has a handful of cleanups and general groundwork, but is not
quite there yet on full enablement.
Platforms that are enabled through this branch are VT8500 and Zynq.
Note that i.MX was converted in one of the earlier cleanup branches as
well (before we started a separate topic for multiplatform). And both
new platforms for this merge window, sunxi and bcm, were merged with
multiplatform support enabled."
Fix up conflicts mostly as per Olof.
* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
ARM: zynq: Remove all unused mach headers
ARM: zynq: add support for ARCH_MULTIPLATFORM
ARM: zynq: make use of debug_ll_io_init()
ARM: zynq: remove TTC early mapping
ARM: tegra: move debug-macro.S to include/debug
ARM: tegra: don't include iomap.h from debug-macro.S
ARM: tegra: decouple uncompress.h and debug-macro.S
ARM: tegra: simplify DEBUG_LL UART selection options
ARM: tegra: select SPARSE_IRQ
ARM: tegra: enhance timer.c to get IO address from device tree
ARM: tegra: enhance timer.c to get IRQ info from device tree
ARM: timer: fix checkpatch warnings
ARM: tegra: add TWD to device tree
ARM: tegra: define DT bindings for and instantiate RTC
ARM: tegra: define DT bindings for and instantiate timer
clocksource/mtu-nomadik: use apb_pclk
clk: ux500: Register mtu apb_pclocks
ARM: plat-nomadik: convert platforms to SPARSE_IRQ
mfd/db8500-prcmu: use the irq_domain_add_simple()
mfd/ab8500-core: use irq_domain_add_simple()
...
For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of
pll_ref in the tegra30_clk_init_table and this is resulting in a
boot-time warning. This patch fixes this by correcting the clk init
table.
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Prior to this change, Tegra's debug-macro.S relied on uncompress.h having
determined which UART to use, and whether it was safe to use the UART
(i.e. is it not in reset, and is clocked). This determination was
communicated from uncompress.h to debug-macro.S using a few bytes of
Tegra's IRAM (an on-SoC RAM). This had the disadvantage that uncompress.h
was a required part of the kernel boot process; booting a non-compressed
kernel would not allow earlyprintk to operate.
This change duplicates the UART selection and validation logic into
debug-macro.S so that the reliance on uncompress.h is removed.
This also helps out with single-zImage work, since there is currently no
support for using any uncompress.h with single-zImage.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Delete CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH; it's not useful any more:
* No upstream bootloader currently or will ever support this option.
* CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA is a much more direct alternative.
Merge the fixed and automatic UART selection menus into a single choice
for simplicity; now you either pick AUTO_ODMDATA or a single fixed UART,
rather than potentially having an AUTO option override whatever fixed
option was chosen.
Remove TEGRA_DEBUG_UART_NONE; if you don't want a Tegra DEBUG_LL UART,
simply don't turn on DEBUG_LL. NONE used to be the default option, so
pick AUTO_ODMDATA as the new default.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The L2 RAM is in different power domain from the CPU cluster. So the
L2 content can be retained over CPU suspend/resume. To do that, we
need to disable L2 after the MMU is disabled, and enable L2 before
the MMU is enabled. But the L2 controller is in the same power domain
with the CPU cluster. We need to restore it's settings and re-enable
it after the power be resumed.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Enable csite (debug and trace controller) clock at init to prevent it
be disabled. And this also the necessary clock for CPU be brought up or
resumed from a power-gating low power state.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch implements ARM linux patch 6395/1 for Tegra. See commit
1a8e41c "ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache
controller) AuxCtlr register" for details.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
[swarren: added commit subject for referenced patch]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Nothing outside mach-tegra uses this file, so there's no need for it to
be in <mach/>.
Since uncompress.h and debug-macro.S remain in include/mach, they need
to include "../../iomap.h" becaue of this change. uncompress.h will soon
be deleted in later multi-platform/single-zImage patches. debug-macro.S
will need to continue to include this header using an explicit relative
path, to avoid duplicating the physical->virtual address mapping that
iomap.h dictates.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Hotplug function put CPU in offline or online mode at runtime.
When the CPU been put into offline, it was been clock gated. The
offline CPU can be power gated, when the remaining CPU goes into
LP2.
Based on the worked by:
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Hotplug function put CPUs in offline or online state at runtime.
When the CPU been put in the offline state, it was been clock and
power gated. Except primary CPU other CPUs can be hotplugged.
Based on the work by:
Scott Williams <scwilliams@nvidia.com>
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Convert Tegra to use struct smp_operations to provide its SMP
and CPU hotplug operations.
Tested on Harmony.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add Tegra platform specific clock structure clk_tegra and
some helper functions for generic clock framework.
struct clk_tegra is the single strcture used for all types of
clocks. reset and cfg_ex ops moved to clk_tegra from clk_ops.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The Tegra20 HW issue with accessing APBIO registers (such
as fuse registers) directly from the CPU concurrently with
APB DMA accesses has been fixed in Tegra30 and later chips.
Access these registers directly from the CPU on Tegra30
and later, and apply the workaround only for Tegra20.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Chaitanya Bandi <bandik@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Pull sweeping late_initcall cleanup for arm-soc from Olof Johansson:
"This is a patch series from Shawn Guo that moves from individual
late_initcalls() to using a member in the machine structure to invoke
a platform's late initcalls.
This cleanup is a step in the move towards multiplatform kernels since
it would reduce the need to check for compatible platforms in each and
every initcall."
Fix up trivial conflicts in arch/arm/mach-{exynos/mach-universal_c210.c,
imx/mach-cpuimx51.c, omap2/board-generic.c} due to changes nearby (and,
in the case of cpuimx51.c the board support being deleted)
* tag 'cleanup-initcall' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: ux500: use machine specific hook for late init
ARM: tegra: use machine specific hook for late init
ARM: shmobile: use machine specific hook for late init
ARM: sa1100: use machine specific hook for late init
ARM: s3c64xx: use machine specific hook for late init
ARM: prima2: use machine specific hook for late init
ARM: pnx4008: use machine specific hook for late init
ARM: omap2: use machine specific hook for late init
ARM: omap1: use machine specific hook for late init
ARM: msm: use machine specific hook for late init
ARM: imx: use machine specific hook for late init
ARM: exynos: use machine specific hook for late init
ARM: ep93xx: use machine specific hook for late init
ARM: davinci: use machine specific hook for late init
ARM: provide a late_initcall hook for platform initialization
By Stephen Warren (5) and Peter De Schrijver (1)
via Stephen Warren
* 'for-3.5/tegra30-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: dt: tegra cardhu: basic audio support
ARM: dt: tegra30.dtsi: Add audio-related nodes
ARM: tegra: add AUXDATA required for audio
ARM: tegra: set up audio clocks for tegra30 dt
ARM: tegra: Initialize pll_p_out1
ARM: tegra: provide clock aliases for AHUB configlink
Signed-off-by: Olof Johansson <olof@lixom.net>
pll_p_out4 is used on all/most Tegra boards to drive the cdev2 output pin
to provide a reference clock to a ULPI USB PHY. This reference clock must
run at 24MHz, and the cdev2 output has no additional dividers.
Remove board-paz00.c's now-duplicate initialization of this clock.
Reported-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Commit 40f9cf0 "ARM: tegra: reparent sclk to pll_c_out1" changed the
rate of hclk. Since pclk is derived from that, and only has integer
dividers, the pclk rate needs to change in the same fashion, from 54MHz
to 60MHz.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
pll_p_out4 needs to be used for other purposes. Reparent sclk so that
it runs from pll_c. Change sclk's rate to 120MHz from 108MHz since this
is the lowest precise rate that can be achieved by dividing the pll_c
rate without reducing the sclk rate. (600/5=120, 600/5.5=109.0909...,
600/6=100).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
pll_a uses pll_p_out1 as its parent. Therefore this clock needs to be
initialized to make sure pll_a has a known input clock. Failure to do so
will cause the system to crash early in the bootup.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Pull "ARM: More SoC support updates" from Olof Johansson:
"This branch contains a handful of updates of SoC base code that had
dependencies on other external trees that have now been merged:
* Support for the new EXYNOS5250 SoC from Samsung
* SMP and power domain support for Tegra3 from NVIDIA
* ux500 updates for exporting SoC information through sysfs"
Fix up trivial merge conflicts as per Olof.
* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (30 commits)
ARM: mach-shmobile: ap4evb: Reserve DMA memory for the frame buffer
ARM: EXYNOS: Fix compilation error with mach-exynos4-dt board
ARM: dts: add initial dts file for EXYNOS5250, SMDK5250
ARM: EXYNOS: add support device tree enabled board file for EXYNOS5
ARM: EXYNOS: add support ARCH_EXYNOS5 for EXYNOS5 SoCs
ARM: EXYNOS: add support get_core_count() for EXYNOS5250
ARM: EXYNOS: support EINT for EXYNOS4 and EXYNOS5
ARM: EXYNOS: add interrupt definitions for EXYNOS5250
ARM: EXYNOS: add support for EXYNOS5250 SoC
ARM: EXYNOS: add support uart for EXYNOS4 and EXYNOS5
ARM: EXYNOS: add initial setup-i2c0 for EXYNOS5
ARM: EXYNOS: add clock part for EXYNOS5250 SoC
ARM: EXYNOS: use exynos_init_uarts() instead of exynos4_init_uarts()
ARM: EXYNOS: to declare static for mach-exynos/common.c
ARM: EXYNOS: Add clkdev lookup entry for lcd clock
ARM: dt: Explicitly configure all serial ports on Tegra Cardhu
ARM: tegra: support for secondary cores on Tegra30
ARM: tegra: support for Tegra30 CPU powerdomains
ARM: tegra: add support for Tegra30 powerdomains
ARM: tegra: export tegra_powergate_is_powered()
...
Pull "ARM: driver specific updates" from Arnd Bergmann:
"These are all specific to some driver. They are typically the
platform side of a change in the drivers directory, such as adding a
new driver or extending the interface to the platform. In cases where
there is no maintainer for the driver, or the maintainer prefers to
have the platform changes in the same branch as the driver changes,
the patches to the drivers are included as well.
A much smaller set of driver updates that depend on other branches
getting merged first will be sent later.
The new export of tegra_chip_uid conflicts with other changes in
fuse.c. In rtc-sa1100.c, the global removal of IRQF_DISABLED
conflicts with the cleanup of the interrupt handling of that driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>"
Fixed up aforementioned trivial conflicts.
* tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (94 commits)
ARM: SAMSUNG: change the name from s3c-sdhci to exynos4-sdhci
mmc: sdhci-s3c: add platform data for the second capability
ARM: SAMSUNG: support the second capability for samsung-soc
ARM: EXYNOS: add support DMA for EXYNOS4X12 SoC
ARM: EXYNOS: Add apb_pclk clkdev entry for mdma1
ARM: EXYNOS: Enable MDMA driver
regulator: Remove bq24022 regulator driver
rtc: sa1100: add OF support
pxa: magician/hx4700: Convert to gpio-regulator from bq24022
ARM: OMAP3+: SmartReflex: fix error handling
ARM: OMAP3+: SmartReflex: fix the use of debugfs_create_* API
ARM: OMAP3+: SmartReflex: micro-optimization for sanity check
ARM: OMAP3+: SmartReflex: misc cleanups
ARM: OMAP3+: SmartReflex: move late_initcall() closer to its argument
ARM: OMAP3+: SmartReflex: add missing platform_set_drvdata()
ARM: OMAP3+: hwmod: add SmartReflex IRQs
ARM: OMAP3+: SmartReflex: clear ERRCONFIG_VPBOUNDINTST only on a need
ARM: OMAP3+: SmartReflex: Fix status masking in ERRCONFIG register
ARM: OMAP3+: SmartReflex: Add a shutdown hook
ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP
...
Conflicts:
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/fuse.c
drivers/rtc/rtc-sa1100.c
Pull "ARM: SoC specific updates" from Arnd Bergmann:
"These changes are all specific to an soc family or the code for one
soc. Lots of work for Tegra3 this time, but also a lot of other
platforms. There will be another (smaller) set of soc patches later
in the merge window for stuff that has dependencies on external trees
or that was sent just before the merge window opened.
The asoc tree added a few devices to the i.mx platform, which conflict
with other devices added in the same place here.
The tegra Makefile conflicts between a number of branches, mostly
because of changes regarding localtimer.c, which was removed in the
end.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>"
Fix up some trivial conflicts, including the mentioned Tegra Makefile.
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (51 commits)
ARM: EXYNOS: fix cycle count for periodic mode of clock event timers
ARM: EXYNOS: add support JPEG
ARM: EXYNOS: Add DMC1, allow PPMU access for DMC
ARM: SAMSUNG: Correct MIPI-CSIS io memory resource definition
ARM: SAMSUNG: fix __init attribute on regarding s3c_set_platdata()
ARM: SAMSUNG: Add __init attribute to samsung_bl_set()
ARM: S5PV210: Add usb otg phy control
ARM: S3C64XX: Add usb otg phy control
ARM: EXYNOS: Enable l2 configuration through device tree
ARM: EXYNOS: remove useless code to save/restore L2
ARM: EXYNOS: save L2 settings during bootup
ARM: S5P: add L2 early resume code
ARM: EXYNOS: Add support AFTR mode on EXYNOS4210
ARM: mx35: Setup the AIPS registers
ARM: mx5: Use common function for configuring AIPS
ARM: mx3: Setup AIPS registers
ARM: mx3: Let mx31 and mx35 enter in LPM mode in WFI
ARM: defconfig: imx_v6_v7: build in REGULATOR_FIXED_VOLTAGE
ARM: imx: update imx_v6_v7_defconfig
ARM: tegra: Demote EMC clock inconsistency BUG to WARN
...
Conflicts:
arch/arm/mach-tegra/common.c
arch/arm/mach-ux500/devices-common.c
This resolves two conflicts and lets us merge the exynos5 branch
cleanly.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tegra SoC driver support.
Some device tree conversions, some new drivers. and a fix for an issue
introduced in Grant Likely's irq_domain conversion in his tree. Because
of that, this branch depends on his branch to build (but not to merge):
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
* tag 'tegra-soc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra: (34 commits)
ARM: tegra: uncompress.h: Don't depend on kernel headers
gpio: tegra: Fix build issue due to irq_domain rework.
ARM: tegra: Remove duplicate PMU interrupt inversion code
ARM: tegra: Add a simple PMC driver
ARM: tegra: dma: not required to move requestor when stopping.
ARM: tegra: Fix EMC pdata initialization from registers
gpio: tegra: Parameterize the number of banks
gpio: tegra: Dynamically allocate IRQ base, and support DT
ARM: tegra: Remove use of TEGRA_GPIO_TO_IRQ
ARM: tegra: Pass uncompress.h UART selection to DEBUG_LL
ARM: tegra: uncompress.h: Choose a UART at runtime
ARM: tegra: uncompress.h: Store UART address in a variable
ARM: tegra: Introduce define DEBUG_UART_SHIFT
ARM: tegra: Support Tegra30 in decompressor UART setup
ARM: tegra: Pause DMA when reading transfer count
ARM: tegra: emc: device tree support
ARM: tegra: emc: convert tegra2_emc to a platform driver
ARM: tegra: fuse: add bct strapping reading
ARM: tegra: fuse: add functions to access chip revision
ARM: tegra: fuse: use apbio dma for register access
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From: Olof Johansson <olof@lixom.net>
SoC new development for tegra SoCs, mostly tegra30 core support.
It also includes one stray bugfix that was misapplied (should have been
in soc-drivers), but it went out to the stable branches before I noticed
so I've left it in.
* tag 'tegra-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra:
ARM: tegra: Demote EMC clock inconsistency BUG to WARN
ARM: tegra: Avoid compiling cpuidle code when not configured
ARM: tegra: cpuidle driver for tegra
ARM: tegra: assembler code for LP3
ARM: tegra: definitions for flow controller
ARM: tegra: initialize basic system clocks
ARM: tegra: enable tegra30 clock framework
ARM: tegra: implement basic tegra30 clock framework
ARM: tegra: add support for new clock framework features
ARM: tegra: add support for tegra30 interrupts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Secondary CPU powerdomains can be powergated on Tegra30. Add the necessary
functions to do this. This will be used to boot the secondary CPUs later on.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Secondary core bringup relies on the Tegra chipid to distinguish between
Tegra variants. Therefore this data needs to be available early on.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This PMC driver is enough to parse the nvidia,invert-interrupt property
from device tree, and configure the PMC's to honor that.
In the future, this file could expand to centralize all other PMC accesses
within the mach-tegra code.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
uncompress.h now saves the selected UART's physical address in Tegra's
IRAM, along with a cookie to indicate validity.
The first time it's run, macro addruart in debug-macro.S looks for this
cookie, and if it's present, uses the UART address stored there. If not,
the static value TEGRA_DEBUG_UART_BASE is used, as was previous behaviour.
The static behaviour will thus be used when not booting using a zImage.
This work was inspired by work by Doug Anderson <dianders@chromium.org>;
see http://lkml.org/lkml/2011/9/26/284. However, this patch relies on
the data passing describe above, rather than duplicating the UART
selection logic in debug-macro.S; the latest selection logic is more
complex due to the need to check reset/clock bits too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Acked-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This fixes a build break attempting to build a Tegra20-only kernel
without device tree enabled.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
