Commit Graph

17 Commits

Author SHA1 Message Date
Florian Fainelli
add427c49e soc: bcm: brcmstb: biuctrl: Update programming for 7211
Add a matching entry for 7211 which can be programmed with the same
BIUCTRL settings as other Brahma-B53 based SoCs. While at it, rename the
function to include a72 in the name to reflect this applies to both
types of 64-bit capable CPUs that we support (Brahma-B53 and
Cortex-A72).

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-05 13:44:04 -08:00
Florian Fainelli
ea1e84d1bd soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211
The BIUCTRL layout is a little different on 7211 which is equipped with
a Cortex-A72, account for those register offset differences. We will
match 7211 specifically in a subsequent commit.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-05 13:44:04 -08:00
Florian Fainelli
b2f91a39cf soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216
7255 and 7216 are some of the latest chips that were produced and
support the full register range configuration for the BIU, add the two
entries to get the expected programming.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-05 13:44:04 -08:00
Florian Fainelli
3098f5eb90 soc: bcm: brcmstb: biuctrl: Tune 7260 BIU interface
7260A0 and B0 are both supported, and 7260A0 has a small difference in
that it does not support the write-back control register, which is why
we have a different array of registers. Update the comment above
b53_cpubiuctrl_no_wb_regs to denote that difference.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-05 13:44:04 -08:00
Olof Johansson
c1d6f4adf4 Merge tag 'arm-soc/for-5.2/drivers-fixes' of https://github.com/Broadcom/stblinux into fixes
This pull request contains Broadcom ARM/ARM64/MIPS SoCs device drivers
fixes for 5.2-rc1, please pull the following:

- Florian fixes the biuctrl driver not to create an error condition/path
  upon unsupported CPU and also fixes the biuctrl driver writes to used
  a data barrier which is necessary given the HW block design

* tag 'arm-soc/for-5.2/drivers-fixes' of https://github.com/Broadcom/stblinux:
  soc: bcm: brcmstb: biuctrl: Register writes require a barrier
  soc: brcmstb: Fix error path for unsupported CPUs

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-16 13:24:59 -07:00
Thomas Gleixner
1802d0beec treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 655 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:41 -07:00
Florian Fainelli
6b23af0783 soc: bcm: brcmstb: biuctrl: Register writes require a barrier
The BIUCTRL register writes require that a data barrier be inserted
after comitting the write to the register for the block to latch in the
recently written values. Reads have no such requirement and are not
changed.

Fixes: 34642650e5 ("soc: Move brcmstb to bcm/brcmstb")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:27:50 -07:00
Florian Fainelli
490cad5a3a soc: brcmstb: Fix error path for unsupported CPUs
In case setup_hifcpubiuctrl_regs() returns an error, because of e.g:
an unsupported CPU type, just catch that error and return instead of
blindly continuing with the initialization. This fixes a NULL pointer
de-reference with the code continuing without having a proper array of
registers to use.

Fixes: 22f7a9116e ("soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-05-20 09:27:50 -07:00
Sudeep Holla
a78182980a soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms
Currently if this driver is included, we get the following warning
on any platforms irrespective of whether it's brcmstb platform or not.
"
 brcmstb: biuctrl: missing BIU control node
 brcmstb: biuctrl: MCP: Unable to disable write pairing!
"

This patch allows to exit early without any warning messages on non
brcmstb platforms as it's meaningless for them.

Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Fixes: f780429adf ("soc: brcmstb: biuctrl: Move to early_initcall")
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
[florian: Add fixes tag, make initcall non fatal]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-01-15 15:46:17 +01:00
Florian Fainelli
f780429adf soc: brcmstb: biuctrl: Move to early_initcall
Being called during early_initcall() is early enough that it occurs
before SMP initialization, which is all we care about for the Bus
Interface Unit configuration.

This solves lack of BIU initialization on ARM64 platforms where we do
not have an anchor where to put the BIU initialization (since there are
no machine descriptors).

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:44 -08:00
Florian Fainelli
b4b32e3216 soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings
In order to achieve expected MCP bus throughput on 3 particular chips:
7268, 7271 and 7278, do the appropriate programming of the MCP
interface: increase number of MCP write credits, turn on write-back
throttling when present.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:43 -08:00
Florian Fainelli
6451d644b8 soc: brcmstb: biuctrl: Wire-up new registers
Add definitions for B53 systems register: CPU_MCP_FLOW_REG and
CPU_WRITEBACK_CTRL_REG. These register will be saved and restored
accordingly.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:42 -08:00
Florian Fainelli
584e55d543 soc: brcmstb: biuctrl: Prepare for saving/restoring other registers
In preparation for saving/restoring additional registers required on
some newer platforms (7268, 7271, 7278), migrate the code to use enums
and helper functions to access registers.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:39 -08:00
Florian Fainelli
22f7a9116e soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs
On Broadcom Brahma-B53 CPUs, the CPU_CREDIT_REG offset got moved to
0x0b0 instead of 0x184, correct this such that we correcty
enable/disable write-pairing for these chips.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:36 -08:00
Florian Fainelli
9257091cf6 soc: brcmstb: Make CPU credit offset more parameterized
In preparation for fixing and changing values in the CPU_CREDIT_REG
register for B53-based systems, make the offset parameterized.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:32 -08:00
Ben Dooks
a536bcc931 soc: brcmstb: fix warning from missing include
The brcmstb_biuctrl_init() is defined in the soc specific header
file, but wasn't included in the driver file. Fix the following
warning by including <linux/soc/brcmstb/brcmstb.h> in the driver:

drivers/soc/brcmstb/biuctrl.c:101:13: warning: symbol 'brcmstb_biuctrl_init' was not declared. Should it be static?

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-06-07 13:53:42 -07:00
Florian Fainelli
34642650e5 soc: Move brcmstb to bcm/brcmstb
Unify the different Broadcom SoCs directory and have everybody live
under drivers/soc/bcm/*.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31 11:06:34 -07:00