Michal Wajdeczko
8979187a8c
drm/i915: Move i915_gem_fini to i915_gem.c
...
We should keep i915_gem_init/fini functions together for easier
tracking of their symmetry.
v2: rebased, pulled out from the series
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20180604090032.20840-1-michal.wajdeczko@intel.com
2018-06-04 15:00:01 +01:00
Arkadiusz Hiler
5428bf5a9a
drm/i915/icl: Calculate link clock using the new registers
...
Start using the new registers for ICL and on.
Cc: Manasi Navare <manasi.d.navare@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180522002558.29262-13-paulo.r.zanoni@intel.com
2018-06-01 16:15:35 -07:00
Manasi Navare
51c83cfaf9
drm/i915/icl: Get DDI clock for ICL based on PLLs.
...
PLLs are the source clocks for the DDIs so in order
to determine the ddi clock we need to check the PLL
configuration.
This gets a little tricky for ICL since there is
no register bit that maps directly to the link clock.
So this patch creates a separate function in intel_dpll_mgr.c
to obtain the write array PLL Params and compares the set
pll_params with the table to get the corresponding link
clock.
v2:
- Fix the encoder type check (DK).
- Improve our error checking, return a sane value (Mika, Paulo).
- Fix table entries (Paulo).
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Mika Kahola <mika.kahola@intel.com >
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com >
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
[Paulo: implement v2]
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180523224444.19017-1-paulo.r.zanoni@intel.com
2018-06-01 16:14:38 -07:00
Anusha Srivatsa
f17ca5010c
drm/i915/icl: Add Icelake PCH detection
...
This patch adds the support to detect PCH_ICP.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Suggested-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Michel Thierry <michel.thierry@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180522002558.29262-10-paulo.r.zanoni@intel.com
2018-06-01 16:14:26 -07:00
Radhakrishna Sripada
3937eb1a07
drm/i915/icl: Map VBT DDC Pin to BSpec DDC Pin
...
On ICL we need to map VBT DDC Pin to BSpec DDC Pin.
Adding ICL Pin Values.
According to VBT
Block 2 (General Bytes Definition)
DDC Bus
+----------+-----------+--------------------+
| DDI Type | VBT Value | BSpec Mapped Value |
+----------+-----------+--------------------+
| DDI-A | 0x1 | 0x1 |
| DDI-B | 0x2 | 0x2 |
| PORT-1 | 0x4 | 0x9 |
| PORT-2 | 0x5 | 0xA |
| PORT-3 | 0x6 | 0xB |
| PORT-4 | 0x7 | 0xC |
+----------+-----------+--------------------+
Cc: James Ausmus <james.ausmus@intel.com >
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Cc: Clinton Taylor <clinton.a.taylor@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Reviewed-by: James Ausmus <james.ausmus@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
[Paulo: checkpatch fixes.]
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180522002558.29262-9-paulo.r.zanoni@intel.com
2018-06-01 16:13:54 -07:00
Manasi Navare
a2bc69a1a9
drm/i915/icl: Add register definition for DFLEXDPMLE
...
DFLEXDPMLE register is required to tell the FIA hardware which
main links of DP are enabled on TCC Connectors. FIA uses this
information to program PHY to Controller signal mapping.
This register is applicable in both TC connector's Alternate mode
as well as DP connector mode.
v2:
* Remove _ICL prefix since the reg is first introduced
in ICL (Paulo)
* s/ICL/icl in commit message (Lucas)
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Animesh Manna <animesh.manna@intel.com >
Cc: Madhav Chauhan <madhav.chauhan@intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1527275032-4555-1-git-send-email-manasi.d.navare@intel.com
2018-06-01 16:06:16 -07:00
Paulo Zanoni
ac213c1b45
drm/i915/icl: introduce tc_port
...
Add and enum for TC ports and auxiliary functions to handle them.
Icelake brings a lot of registers and other things that only apply to
the TC ports and are indexed starting from 0, so having an enum for
tc_ports that starts at 0 really helps the indexing.
This patch is based on previous patches written by Dhinakaran Pandiyan
and Mahesh Kumar.
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Cc: Mahesh Kumar <mahesh1.kumar@intel.com >
Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180522002558.29262-4-paulo.r.zanoni@intel.com
2018-06-01 16:04:56 -07:00
Dhinakaran Pandiyan
9bb635d9e7
drm/i915/icl: Extend AUX F interrupts to ICL
...
ICL has AUX F.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180522002558.29262-2-paulo.r.zanoni@intel.com
2018-06-01 16:03:23 -07:00
Mahesh Kumar
c46ef57d20
drm/i915/icl: fix icl_unmap/map_plls_to_ports
...
All connectors may not have best_encoder attached, so don't dereference
encoder pointer for each connector.
Fixes: c27e917e2blucas.demarchi@intel.com >
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180525155238.7054-1-lucas.demarchi@intel.com
2018-06-01 16:02:43 -07:00
Chris Wilson
95c778daec
drm/i915: Apply the full CPU domain markup before freezing
...
Let's not take any chances by using a shortcut to mark the objects as in
the CPU domain upon freezing (all pages will be written to disk and so
on restore all objects will start from the CPU domain). Currently, we
simply mark the objects as being in the CPU domain, bypassing the
flushes. Let's call the full domain transfer function so that we have
less special case code (and symmetry with the suspend path) even though
it will be mostly redundant.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Mika Kuoppala <mika.kuoppala@intel.com >
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180601144125.18026-2-chris@chris-wilson.co.uk
2018-06-01 21:42:15 +01:00
Chris Wilson
9776f47253
drm/i915: Flush all writes before suspend
...
As we have already suspended the device, this should be a no-op except
for marking that all writes are indeed complete. The downside is that
we then have to walk all the lists of objects for what should be a no-op
(in some cases they will be mmio read to ensure the GGTT writes are
indeed flushed, and clflushes to ensure that cpu writes are in memory).
It seems prudent and the safer course for us to ensure all writes are
flushed to memory before suspend.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Mika Kuoppala <mika.kuoppala@intel.com >
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180601144125.18026-1-chris@chris-wilson.co.uk
2018-06-01 21:42:14 +01:00
Ville Syrjälä
0a59952b24
drm/i915: Configure SKL+ scaler initial phase correctly
...
Set up the SKL+ scaler initial phase registers correctly. Otherwise
we start fetching the data from the center of the first pixel instead
of the top-left corner, which obviously then leads to right/bottom edges
replicating data excessively as the data runs out half a pixel too soon.
Cc: Vidya Srinivas <vidya.srinivas@intel.com >
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180521185613.5097-2-ville.syrjala@linux.intel.com
Reviewed-By: Vidya Srinivas <vidya.srinivas@intel.com >
2018-06-01 18:40:19 +03:00
Ville Syrjälä
012d79e6a3
drm/i915: Remove bogus NV12 PLANE_COLOR_CTL setup
...
We already handle the color encoding mode properly. Remove the broken
NV12 special case.
Cc: Vidya Srinivas <vidya.srinivas@intel.com >
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Fixes: 8ed30ab6acville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180521185613.5097-1-ville.syrjala@linux.intel.com
Reviewed-By: Vidya Srinivas <vidya.srinivas@intel.com >
2018-06-01 18:40:19 +03:00
Ville Syrjälä
b4686c481b
drm/i915: Fix tabs vs. spaces in sprite code
...
The sprite code has a bunch of spaces where tabs should be used. Fix it
up.
v2: Make the patch subject more specific (Jani)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180530165933.11424-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2018-06-01 18:40:19 +03:00
Ville Syrjälä
6380db61c5
drm/i915: s/plane/i9xx_plane/
...
Call the enum i9xx_plane_id variable i9xx_plane like we do elsewhere.
Cc: Hans de Goede <j.w.r.degoede@gmail.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180130203807.13721-7-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2018-06-01 18:40:19 +03:00
Ville Syrjälä
e876b78c5f
drm/i915: Disable trickle feed for SNB/IVB cursors
...
We disable trickle feed whenever possible, except for the cursors
on SNB/IVB. Let's try disabling it there too if for no other reason
than consistency.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180130203807.13721-5-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2018-06-01 18:40:19 +03:00
Ville Syrjälä
b99b9ec1d3
drm/i915: Clean up cursor defines
...
Use MCURSOR_ instead of CURSOR_ as the prefix for the non-845/865
cursor defines consistently, and move the pipe CSC enable bit next
to the other non-845/865 cursor defines.
v2: Take care of gvt uses as well
v3: Another gvt use popped up
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180131143709.875-1-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com > #v2
2018-06-01 18:40:19 +03:00
Ville Syrjälä
eade6c8944
drm/i915: Have plane->get_hw_state() return the current pipe
...
Like we do for encoder let's make the plane->get_hw_state() return
the pipe to which the plane is currently attached. We don't currently
allow planes to move between the pipes, but perhaps one day we will.
In either case this makes the code more uniform and perhaps makes
intel_plane_mapping_ok() slightly more clear.
Note that for i965 and g4x planes A and B still have pipe select bits
but they're hardwired to pipe A and B respectively. This means we can
safely interpret those bits just like on gen2/3. This allows the
same readout code work for plane C (which can still be assigned
to eiter pipe on i965) should we ever expose it.
g4x no longer allows moving the cursor planes between the pipes,
but the pipe select bits can still be set in the register. Thus
we have to ignore those bits. OTOH i965 still allows the cursors
to move between pipes thus we have to trust the bits there.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180130203807.13721-3-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2018-06-01 18:40:19 +03:00
Chris Wilson
3df845e752
drm/i915/gtt: Don't restore the non-existent PDE for GGTT
...
On resume, we have to rewrite all the PDE entries for gen7 ppgtts. If we
switch on full-ppgtt, there is then one address space with no PDE, the
GGTT. Currently under aliasing-ppgtt, the GGTT address space does have
an associated ppgtt and so the restore works just fine. We would have a
similar problem if we tried disabling aliasing-ppgtt
(i915.enable_ppgtt=0). So skip the empty ppgtt, as being non-existent it
doesn't need restoring.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180601093554.13083-2-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
2018-06-01 14:53:40 +01:00
Chris Wilson
37800ca803
drm/i915/gtt: Avoid calling non-existent allocate_va_range
...
On hsw and older, we do not need to allocate the ppgtt on the fly and so
ppgtt->allocate_va_range() is NULL. Fixup ppgtt_bind_vma not to call it,
in that case!
v2: PIN_UPDATE still exists.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20180601093554.13083-1-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180601093554.13083-2-chris@chris-wilson.co.uk
2018-06-01 14:53:21 +01:00
Chris Wilson
e312b689a9
drm/i915: Check intel_contexts to avoid one extra pointer chase
...
As we store the intel_context on the request (rq->hw_context), we can
simply compare that against the local intel_context for the
i915->kernel_context rather than using the rq->gem_context.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180601094002.13329-1-chris@chris-wilson.co.uk
2018-06-01 13:38:43 +01:00
Chris Wilson
1934f5deaf
drm/i915: Assert we idle in the kernel context
...
Now that we always switch to the kernel context upon idling, we can
make that assertion.
References: 4dfacb0bcbchris@chris-wilson.co.uk >
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180531224057.6036-1-chris@chris-wilson.co.uk
2018-06-01 13:38:40 +01:00
Chris Wilson
ec92ad00a3
drm/i915: Only sanitize GEM from late suspend
...
During testing we encounter a conflict between SUSPEND_TEST_DEVICES and
disabling reset (gem_eio/suspend). This results in the device continuing
on without being reset, but since it has gone through HW sanitization to
account for the suspend/resume cycle, we have to assume the device has
been reset to its defaults. A simple way around this is to skip the
sanitize phase for SUSPEND_TEST_DEVICES by moving it to suspend-late.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180531082246.9763-4-chris@chris-wilson.co.uk
2018-05-31 19:29:54 +01:00
Chris Wilson
c3160da9a6
drm/i915: After reset on sanitization, reset the engine backends
...
As we reset the GPU on suspend/resume, we also do need to reset the
engine state tracking so call into the engine backends. This is
especially important so that we can also sanitize the state tracking
across resume.
References: https://bugs.freedesktop.org/show_bug.cgi?id=106702
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180531082246.9763-3-chris@chris-wilson.co.uk
2018-05-31 19:29:53 +01:00
Chris Wilson
0606035fca
drm/i915: "Race-to-idle" after switching to the kernel context
...
During suspend we want to flush out all active contexts and their
rendering. To do so we queue a request from the kernel's context, once
we know that request is done, we know the GPU is completely idle. To
speed up that switch bump the GPU clocks.
Switching to the kernel context prior to idling is also used to enforce
a barrier before changing OA properties, and when evicting active
rendering from the global GTT. All cases where we do want to
race-to-idle.
v2: Limit the boosting to only the switch before suspend.
v3: Limit it to the wait-for-idle on suspend.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: David Weinehall <david.weinehall@linux.intel.com >
Cc: Mika Kuoppala <mika.kuoppala@intel.com >
Tested-by: David Weinehall <david.weinehall@linux.intel.com > #v1
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180531082246.9763-2-chris@chris-wilson.co.uk
2018-05-31 19:29:52 +01:00
Chris Wilson
4dfacb0bcb
drm/i915: Switch to kernel context before idling at runtime
...
We can reduce our exposure to random neutrinos by resting on the kernel
context having flushed out the user contexts to system memory and
beyond. The corollary is that we then we require two passes through the
idle handler to go to sleep, which on a truly idle system involves an
extra pass through the slow and irregular retire work handler.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180531082246.9763-1-chris@chris-wilson.co.uk
2018-05-31 19:29:50 +01:00
Michal Wajdeczko
13295bd887
drm/i915/guc: Don't read SOFT_SCRATCH(15) on MMIO error
...
SOFT_SCRATCH(15) is used by GuC for sending MMIO GuC events to host and
those events are now handled by intel_guc_to_host_event_handler_mmio().
We should not try to read it on MMIO action error as 1) we may be using
different set of registers for GuC MMIO communication, and 2) GuC may
use CTB mechanism for sending events to host.
While here, upgrade error message to DRM_ERROR.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Michel Thierry <michel.thierry@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20180528171618.10436-1-michal.wajdeczko@intel.com
2018-05-31 19:22:49 +01:00
Chris Wilson
bc61ec46e8
drm/i915: Remove stale asserts from i915_gem_find_active_request()
...
Since we use i915_gem_find_active_request() from inside
intel_engine_dump() and may call that at any time, we do not guarantee
that the engine is paused nor that the signal kthreads and irq handler
are suspended, so we cannot assert that the breadcrumb doesn't advance
and that the irq hasn't happened on another CPU signaling the request we
believe to be idle.
The second assert removed (that request->engine == engine) remains
valid, but is now more rigorously checked during retirement.
Fixes: f636edb214chris@chris-wilson.co.uk >
Cc: Mika Kuoppala <mika.kuoppala@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180529132922.6831-1-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
(cherry picked from commit cc7cc53435jani.nikula@intel.com >
2018-05-31 14:27:03 +03:00
Jani Nikula
368b554d63
Revert "drm/i915/edp: Allow alternate fixed mode for eDP if available."
...
This reverts commit dc911f5bd8https://bugs.freedesktop.org/show_bug.cgi?id=105469
Reported-by: Rune Petersen <rune@megahurts.dk >
Reported-by: Mark Spencer <n7u4722r35@ynzlx.anonbox.net >
Fixes: dc911f5bd8clinton.a.taylor@intel.com >
Cc: David Weinehall <david.weinehall@linux.intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Jim Bride <jim.bride@linux.intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: intel-gfx@lists.freedesktop.org
Cc: <stable@vger.kernel.org > # v4.14+
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180516080110.22770-1-jani.nikula@intel.com
(cherry picked from commit d93fa1b47bjani.nikula@intel.com >
2018-05-31 14:26:53 +03:00
Chris Wilson
dd166fbd8d
drm/i915: Nul-terminate legacy debug string
...
Make sure that when we don't have any scheduler attributes for the
request, the string is terminated.
Fixes: 247870ac8echris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180517152824.11619-1-chris@chris-wilson.co.uk
(cherry picked from commit 96d4f03c20jani.nikula@intel.com >
2018-05-31 14:26:45 +03:00
Maarten Lankhorst
d6cae4aa30
drm/i915: Call intel_opregion_notify_encoder in intel_sanitize_encoder, v2.
...
Normally this is called on a modeset, but the call is missing when
we inherit the mode from the BIOS, so make sure it's called somewhere
in hardware readout.
Changes since v1:
- Unconditionally call intel_opregion_notify_encoder. (Ville)
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180516085038.36785-1-maarten.lankhorst@linux.intel.com
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
2018-05-31 10:42:37 +02:00
Rodrigo Vivi
9d570dbfc0
drm/i915: Update DRIVER_DATE to 20180530
...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2018-05-30 15:00:51 -07:00
Ville Syrjälä
a38189c5f7
drm/i915: Promote .format_mod_supported() to the lead role
...
Up to now we've used the plane's modifier list as the primary
source of information for which modifiers are supported by a
given plane. In order to allow auxiliary metadata to be embedded
within the bits of the modifier we need to stop doing that.
Thus we have to make .format_mod_supported() aware of the plane's
capabilities and gracefully deal with any modifier being passed
in directly from userspace.
v2: Rebase after NV12
Simplify
Cc: Eric Anholt <eric@anholt.net >
References: https://lists.freedesktop.org/archives/dri-devel/2018-March/169782.html
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180518162159.30305-1-ville.syrjala@linux.intel.com
Reviewed-by: Eric Anholt <eric@anholt.net >
2018-05-30 22:28:10 +03:00
Chris Wilson
cc7cc53435
drm/i915: Remove stale asserts from i915_gem_find_active_request()
...
Since we use i915_gem_find_active_request() from inside
intel_engine_dump() and may call that at any time, we do not guarantee
that the engine is paused nor that the signal kthreads and irq handler
are suspended, so we cannot assert that the breadcrumb doesn't advance
and that the irq hasn't happened on another CPU signaling the request we
believe to be idle.
The second assert removed (that request->engine == engine) remains
valid, but is now more rigorously checked during retirement.
Fixes: f636edb214chris@chris-wilson.co.uk >
Cc: Mika Kuoppala <mika.kuoppala@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180529132922.6831-1-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
2018-05-30 12:11:10 +01:00
Dhinakaran Pandiyan
a3db142829
drm/i915/psr: Set idle frame count based on sink synchronization latency
...
DPCD 2009h "Synchronization latency in sink" has bits that tell us the
maximum number of frames sink can take to resynchronize to source timing
when exiting PSR. More importantly, as per eDP 1.4b, this is the "Minimum
number of frames following PSR exit that the Source device needs to
wait for PSR entry."
We currently use this value only to setup the number frames to wait before
PSR2 selective update. But, based on the above description it makes more
sense to use this to configure idle frames for both PSR1 and and PSR2. This
will ensure we wait the required number of frames before
activation whether it is PSR1 or PSR2.
The minimum number of idle frames remains 6, while allowing sink
synchronization latency and VBT to increase this value.
This also solves the flip-flop between sink and source frames that I
noticed on my Thinkpad X260 during PSR exit. This specific panel has a
value of 8h, which according to the spec means the "Source device must
wait for more than eight active frames after PSR exit before initiating PSR
entry. (In this case, should be provided by the panel supplier.)" VBT
however has a value of 0.
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Jose Roberto de Souza <jose.souza@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180525033047.7596-1-dhinakaran.pandiyan@intel.com
2018-05-29 12:53:15 -07:00
Oscar Mateo
4ece66b149
drm/i915/icl: Wa_1406463099
...
Prevents an error in the GAM unit. Also known as WaGamTlbPendError
References: HSDES#1406463099
References: HSDES#1406465643
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com >
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1527285939-20113-12-git-send-email-oscar.mateo@intel.com
2018-05-29 15:56:30 +03:00
Oscar Mateo
0bf059f353
drm/i915/icl: WaEnableFloatBlendOptimization
...
Enables blend optimization for floating point RTs
v2: Rebased on top of the WA refactoring
v3: Added References (Mika)
References: HSDES#1406393558
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com >
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1527285939-20113-5-git-send-email-oscar.mateo@intel.com
2018-05-29 15:55:43 +03:00
Oscar Mateo
b1f88820f4
drm/i915/icl: Wa_2006665173
...
Disable blend embellishment in RCC.
Also, some other registers style fixed in passing.
v2: Rebased on top of the WA refactoring
v3: Added References (Mika)
v4:
- Fixed in B0
- Mentioned style fixes in commit message
References: HSDES#2006665173
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com >
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1527285939-20113-4-git-send-email-oscar.mateo@intel.com
2018-05-29 15:55:17 +03:00
Oscar Mateo
f63c7b4880
drm/i915/icl: WaEnableStateCacheRedirectToCS
...
Redirects the state cache to the CS Command buffer section for
performance reasons.
v2: Rebased
v3: Rebased on top of the WA refactoring
v3: Added References (Mika)
References: HSDES#1604325460
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com >
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1527285939-20113-3-git-send-email-oscar.mateo@intel.com
2018-05-29 15:54:46 +03:00
Oscar Mateo
3c7ab27896
drm/i915/icl: WaDisableImprovedTdlClkGating
...
Revert to the legacy implementation.
v2: GEN7_ROW_CHICKEN2 is masked
v3:
- Rebased
- Renamed to Wa_2006611047
- A0 and B0 only
v4:
- Add spaces around '<<' (and fix the surrounding code as well)
- Mark the WA as pre-prod
v5: Rebased on top of the WA refactoring
v6: Added References (Mika)
v7: Fixed in B0
References: HSDES#2006611047
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com >
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1527285939-20113-2-git-send-email-oscar.mateo@intel.com
2018-05-29 15:52:24 +03:00
Chris Wilson
65b3bdc807
drm/i915/query: nospec expects no more than an unsigned long
...
nospec quite reasonably asserts that it will never be used with an index
larger than unsigned long (that being the largest possibly index into an
C array). However, our ubi uses the convention of u64 for any large
integer, running afoul of the assertion on 32b. Reduce our index to an
unsigned long, checking for type overflow first.
drivers/gpu/drm/i915/i915_query.c: In function 'i915_query_ioctl':
include/linux/compiler.h:339:38: error: call to '__compiletime_assert_119' declared with attribute error: BUILD_BUG_ON failed: sizeof(_s) > sizeof(long)
Reported-by: kbuild-all@01.org
Fixes: 84b510e22dchris@chris-wilson.co.uk >
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180522121018.15199-1-chris@chris-wilson.co.uk
(cherry picked from commit a33b1dc8a7joonas.lahtinen@linux.intel.com >
2018-05-29 13:53:07 +03:00
Chris Wilson
540ead8c5a
drm/i915/query: Protect tainted function pointer lookup
...
Smatch identifies i915_query_ioctl() as being a potential victim of
Spectre due to its use of a tainted user index into a function pointer
array. Use array_index_nospec() to defang the user index before using it
to lookup the function pointer.
Fixes: a446ae2c6echris@chris-wilson.co.uk >
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180521210530.26008-1-chris@chris-wilson.co.uk
(cherry picked from commit 84b510e22djoonas.lahtinen@linux.intel.com >
2018-05-28 13:36:41 +03:00
Chris Wilson
b9eb9c9289
drm/i915/lvds: Move acpi lid notification registration to registration phase
...
Delay registering ourselves with the acpi lid notification mechanism
until we are registering the connectors after initialisation is
complete. This prevents a possibility of trying to handle the lid
notification before we are ready with the danger of chasing
uninitialised function pointers.
BUG: unable to handle kernel NULL pointer dereference at 0000000000000000
IP: (null)
PGD 0 P4D 0
Oops: 0010 [#1 ] PREEMPT SMP PTI
Modules linked in: arc4(+) iwldvm(+) i915(+) mac80211 i2c_algo_bit coretemp mei_wdt iwlwifi drm_kms_helper kvm_intel wmi_bmof iTCO_wdt iTCO_vendor_support kvm snd_hda_codec_conexant snd_hda_codec_generic drm psmouse cfg80211 irqbypass input_leds pcspkr i2c_i801 snd_hda_intel snd_hda_codec thinkpad_acpi snd_hda_core mei_me lpc_ich snd_hwdep e1000e wmi nvram snd_pcm mei snd_timer shpchp ptp pps_core rfkill syscopyarea snd intel_agp sysfillrect intel_gtt soundcore sysimgblt battery led_class fb_sys_fops ac rtc_cmos agpgart evdev mac_hid acpi_cpufreq ip_tables x_tables ext4 crc32c_generic crc16 mbcache jbd2 fscrypto crypto_simd glue_helper cryptd aes_x86_64 xts algif_skcipher af_alg dm_crypt dm_mod sd_mod uas usb_storage serio_raw atkbd libps2 ahci libahci uhci_hcd libata scsi_mod ehci_pci
ehci_hcd usbcore usb_common i8042 serio
CPU: 1 PID: 378 Comm: systemd-logind Not tainted 4.16.8-1-ARCH #1
Hardware name: LENOVO 7454CTO/7454CTO, BIOS 6DET72WW (3.22 ) 10/25/2012
RIP: 0010: (null)
RSP: 0018:ffffaf4580c33a18 EFLAGS: 00010287
RAX: 0000000000000000 RBX: ffff947533558000 RCX: 000000000000003e
RDX: ffffffffc0aa80c0 RSI: ffffaf4580c33a3c RDI: ffff947534e4c000
RBP: ffff947533558338 R08: ffff947534598930 R09: ffffffffc0a928b1
R10: ffffd8f181d5fd40 R11: 0000000000000000 R12: ffffffffc0a928b1
R13: ffff947533558368 R14: ffffffffc0a928a9 R15: ffff947534e4c000
FS: 00007f3dc4ddb940(0000) GS:ffff947539280000(0000) knlGS:0000000000000000
CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 0000000000000000 CR3: 000000006e214000 CR4: 00000000000406e0
Call Trace:
? intel_modeset_setup_hw_state+0x385/0xf60 [i915]
? __intel_display_resume+0x1e/0xc0 [i915]
? intel_display_resume+0xcc/0x120 [i915]
? intel_lid_notify+0xbc/0xc0 [i915]
? notifier_call_chain+0x47/0x70
? blocking_notifier_call_chain+0x3e/0x60
? acpi_lid_notify_state+0x8f/0x1d0
? acpi_lid_update_state+0x49/0x70
? acpi_lid_input_open+0x60/0x90
? input_open_device+0x5d/0xa0
? evdev_open+0x1ba/0x1e0 [evdev]
? chrdev_open+0xa3/0x1b0
? cdev_put.part.0+0x20/0x20
? do_dentry_open+0x14c/0x300
? path_openat+0x30c/0x1240
? current_time+0x16/0x60
? do_filp_open+0x93/0x100
? __check_object_size+0xfb/0x180
? do_sys_open+0x186/0x210
? do_syscall_64+0x74/0x190
? entry_SYSCALL_64_after_hwframe+0x3d/0xa2
Code: Bad RIP value.
RIP: (null) RSP: ffffaf4580c33a18
CR2: 0000000000000000
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106559
Fixes: c1c7af6089chris@chris-wilson.co.uk >
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: Daniel Vetter <daniel.vetter@ffwll.ch >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180518074840.16194-1-chris@chris-wilson.co.uk
Cc: stable@vger.kernel.org
(cherry picked from commit e578a570dcjoonas.lahtinen@linux.intel.com >
2018-05-28 13:36:41 +03:00
Ondrej Zary
b3fb22733a
drm/i915: Disable LVDS on Radiant P845
...
Radiant P845 does not have LVDS, only VGA.
Cc: stable@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105468
Signed-off-by: Ondrej Zary <linux@rainbow-software.org >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180309222204.4771-1-linux@rainbow-software.org
(cherry picked from commit 7f7105f99bjoonas.lahtinen@linux.intel.com >
2018-05-28 13:36:40 +03:00
Michal Wajdeczko
8f1ad1ef1e
drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c
...
Some functions already use i915 name instead of dev_priv.
Let's rename this param in all remaining functions, except
those that still use legacy macros.
v2: don't forget about function descriptions (Sagar)
v3: rebased
v4: rebased
v5: rebased, pulled out from the series
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20180525121858.53928-1-michal.wajdeczko@intel.com
2018-05-25 20:28:54 +01:00
Ville Syrjälä
2b5b63126e
drm/i915: Simplify ilk-ivb underrun suppression
...
Let's suppress the underruns around every modeset sequence instead
of trying to avoid it. Planes are disabled at this point anyway so
we don't really gain anything from keeping the underrun reporting
enabled. Also for PCH ports we already suppress all underruns here
anyway so trying avoid it for the CPU eDP doesn't seem all that
important.
Maybe this gets rid of some lingering spurious underruns?
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180524190406.2973-2-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
2018-05-25 22:19:29 +03:00
Ville Syrjälä
ca3b3fa344
drm/i915: Consult VBT "LVDS config" bits to determine whether internal LVDS is present
...
VBT seems to have some bits to tell us whether the internal LVDS port
has something hooked up. In theory one might expect the VBT to not have
a child device for the LVDS port if there's no panel hooked up, but
in practice many VBTs still add the child device. The "LVDS config" bits
seem more reliable though, so let's check those.
So far we've used the "LVDS config" bits to check for eDP support on
ILK+, and disable the internal LVDS when the value is 3. That value
is actually documented as "Both internal LVDS and SDVO LVDS", but in
practice it looks to mean "eDP" on all the ilk+ VBTs I've seen. So let's
keep that interpretation, but for pre-ILK we will consider the value
3 to also indicate the presence of the internal LVDS.
Currently we have 25 DMI matches for the "no internal LVDS" quirk. In an
effort to reduce that let's toss in a WARN when the DMI match and VBT
both tell us that the internal LVDS is not present. The hope is that
people will report a bug, and then we can just nuke the corresponding
entry from the DMI quirk list. Credits to Jani for this idea.
v2: Split the basic int_lvds_support thing to a separate patch (Jani)
v3: Rebase
v4: Limit this to VBT version >= 134
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Ondrej Zary <linux@rainbow-software.org >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180518150138.18361-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2018-05-25 18:00:26 +03:00
Ville Syrjälä
ea80a661fe
drm/i915: Try to suppress more spurious PCH underruns on ILK-IVB
...
My ILK seems to generate a spurious PCH underrun with most interlaced
HDMI modes. Add a second vblank wait to avoid it.
We have seen some spurious PCH underruns still in CI as well, some
of which seem to be progressive DP. The logs also point towards some
spurious underrins with progressive HDMI on SNB. While I don't have
a solid explanation for those let's try to kill all the birds with one
stone and always do the double wait.
Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106387
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180524190406.2973-1-ville.syrjala@linux.intel.com
Acked-by: Chris Wilson <chris@chris-wilson.co.uk >
2018-05-25 18:00:26 +03:00
Ville Syrjälä
10ed55e4d9
drm/i915: Initialize panel_pipe to INVALID_PIPE
...
We can always figure out which pipe is affected by the panel power
sequencer lockout mechanism. So no need for the pipe A fallback
anymore. The only case we may have to worry about is an invalid
port select in the power sequencer, but INVALID_PIPE is just fine
in that case. We'll get the WARN about the bogus pps port select
anyway.
Cc: Jani Nikula <jani.nikula@intel.com >
Suggested-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180523145718.22932-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
2018-05-25 18:00:26 +03:00
Chris Wilson
73b66f8731
drm/i915: Prepare GEM for suspend earlier
...
In order to prepare the GPU for sleeping, we may want to submit commands
to it. This is a complicated process that may even require some swapping
in from shmemfs, if the GPU was in the wrong state. As such, we need to
do this preparation step synchronously before the rest of the system has
started to turn off (e.g. swapin fails if scsi is suspended).
Fortunately, we are provided with a such a hook, pm_ops.prepare().
v2: Compile cleanup
v3: Fewer asserts, fewer problems?
v4: Ville pointed out that in some circumstances (such as switching off
the overlay) the display code may issue a GPU request. This is
unexpected, and will result in us going to sleep with us believing the
GPU is still awake (though all user work has been saved). Add a comment
to remind our future selves of what trouble brews.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106640
Testcase: igt/drv_suspend after igt/gem_tiled_swapping
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20180525092629.1456-1-chris@chris-wilson.co.uk
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com >
2018-05-25 14:52:20 +01:00
