Commit Graph

54784 Commits

Author SHA1 Message Date
Vladimir Zapolskiy
caaac8cde9 ARM: dts: imx31: add LogicPD MX31Lite board description
The added DTS contains a combined description of LogicPD MX31 Lite
SoM devices, peripherals are routed to ports on a baseboard:
* PATA controller,
* SD/MMC controller,
* 2 GPIO LEDs,
* UART controllers,
* Freescale MC13783 MFD connected over SPI,
* SMSC LAN9117,
* ST Micro NAND SLC, 64 MiB,
* Intel NOR flash, 16 MiB.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-11 20:26:02 +08:00
Vladimir Zapolskiy
465b3d77b1 ARM: dts: imx31: add device tree description of basic controllers
The change adds a number of basic peripherals found on i.MX31 SoC:
* GPIO controllers,
* I2C master controllers,
* SPI master controllers,
* ATA controller,
* SDHC controllers,
* RTC, watchdog and PWM contollers,
* SDMA,
* IRAM,
* NAND and WEIM controllers on EMI.

The added controller devices were tested on Freescale i.MX31 powered
LogicPD Lite SoM and baseboard.

DMA functionality was tested on SDHC and SPI controllers so far,
thus dmas properties are added to those device nodes only.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-11 20:24:09 +08:00
Vladimir Zapolskiy
08a213c24f ARM: i.MX31: remove rnga registration as a platform device
On i.MX31 powered boards with OF support Security Random Number
Generator Accelerator RNGA controller is initialized from device tree,
its registration as a platform device is redundant and actually it is
broken due to missing clock information:

  mxc_rnga mxc_rnga: Could not get rng_clk!
  mxc_rnga: probe of mxc_rnga failed with error -2

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-11 20:23:18 +08:00
Masahiro Yamada
2288fd5180 ARM: 8779/1: add endianness option to LDFLAGS instead of LD
With the recent syntax extension, Kconfig is now able to evaluate the
compiler / toolchain capability.

However, accumulating flags to 'LD' is not compatible with the way
it works; 'LD' must be passed to Kconfig to call $(ld-option,...)
from Kconfig files.  If you tweak 'LD' in arch Makefile depending on
CONFIG_CPU_BIG_ENDIAN, this would end up with circular dependency
between Makefile and Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-11 11:02:10 +01:00
Will Deacon
e69244d295 ARM: 8777/1: Hook up SYNC_CORE functionality for sys_membarrier()
Exception return implies context synchronization, so we can hook up the
SYNC_CORE option to sys_membarrier() simply by selecting the Kconfig option,
just like we've done for arm64 already.

Cc: Orion Hodson <oth@google.com>
Acked-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-11 11:02:08 +01:00
Vladimir Murzin
cea394772d ARM: 8775/1: NOMMU: Use instr_sync instead of plain isb in common code
Greg reported that commit 3c24121039 ("ARM: 8756/1: NOMMU: Postpone
MPU activation till __after_proc_init") is causing breakage for the
old Versatile platform in no-MMU mode (with out-of-tree patches):

  AS      arch/arm/kernel/head-nommu.o
arch/arm/kernel/head-nommu.S: Assembler messages:
arch/arm/kernel/head-nommu.S:180: Error: selected processor does not support `isb' in ARM mode
scripts/Makefile.build:417: recipe for target 'arch/arm/kernel/head-nommu.o' failed
make[2]: *** [arch/arm/kernel/head-nommu.o] Error 1
Makefile:1034: recipe for target 'arch/arm/kernel' failed
make[1]: *** [arch/arm/kernel] Error 2

Since the code is common for all NOMMU builds usage of the isb was a
bad idea (please, note that isb also used in MPU related code which is
fine because MPU has dependency on CPU_V7/CPU_V7M), instead use more
robust instr_sync assembler macro.

Fixes: 3c24121039 ("ARM: 8756/1: NOMMU: Postpone MPU activation till __after_proc_init")
Reported-by: Greg Ungerer <gerg@kernel.org>
Tested-by: Greg Ungerer <gerg@kernel.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-11 11:00:41 +01:00
Paul Kocialkowski
626e6ee210 ARM: dts: sun8i: h3: Add SRAM controller node and C1 SRAM region
This adds a SRAM controller node for the H3, with support for the C1
SRAM region that is shared between the Video Engine and the CPU.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
[Maxime: Fixed the compatible and commit prefix]
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 11:26:37 +02:00
Maxime Ripard
ae54cf89d6 ARM: dts: sun8i: a23-a33: Add SRAM controller node and C1 SRAM region
This adds a SRAM controller node for the A23 and A33, with support for
the C1 SRAM region that is shared between the Video Engine and the CPU.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
[Maxime: Fixed the prefix and the compatibles]
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 11:26:37 +02:00
Maxime Ripard
77c223c118 ARM: dts: sun7i: Add support for the C1 SRAM region with the SRAM controller
This adds support for the C1 SRAM region (to be used with the SRAM
controller driver) for the A20 platform. The region is shared
between the Video Engine and the CPU.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
[Maxime: Fixed the SRAM C size]
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 11:26:37 +02:00
Maxime Ripard
c2e01602dc ARM: dts: sun5i: Add support for the C1 SRAM region with the SRAM controller
This adds support for the C1 SRAM region (to be used with the SRAM
controller driver) for sun5i-based platforms. The region is shared
between the Video Engine and the CPU.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
[Maxime: Fixed the SRAM C size to take the C2 and C3 SRAM into account]
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 11:26:37 +02:00
Paul Kocialkowski
f4ca1a5c7e ARM: dts: sun7i: Use most-qualified system control compatibles
This switches the sun7i-a20 dtsi to use the most qualified compatibles
for the system-control block (previously named SRAM controller) as well
as the SRAM blocks. The sun4i-a10 compatibles are kept since these
hardware blocks are backward-compatible.

The node name for system control is also updated to reflect the fact that
the controller described is really about system control rather than SRAM
control.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 11:03:19 +02:00
Paul Kocialkowski
6b7677c053 ARM: dts: sun5i: Use most-qualified system control compatibles
This switches the sun5i dtsi to use the most qualified compatibles for
the system-control block (previously named SRAM controller) as well as
the SRAM blocks.

The node name for system control is also updated to reflect the fact that
the controller described is really about system control rather than SRAM
control.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
[Maxime: Removed the A10 compatible for the driver]
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 11:00:50 +02:00
Paul Kocialkowski
37fb1f8d45 ARM: dts: sun4i: Switch to new system control compatible string
This switches the sun4i-a10 dtsi to use the new compatible for the
system-control block (previously named SRAM controller) instead of
the deprecated one.

The node name is also updated to reflect the fact that the controller
described is really about system control rather than SRAM control.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
[Maxime: Amended the commit message]
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 10:56:53 +02:00
Jernej Skrabec
6a7556f604 ARM: dts: sun8i: r40: Disable TCONs by default.
R40 has 4 TCONs, but only 2 of them can receive some kind of output at
the same time. Let's disable them by default, so only those which are
really connected on board can be enabled in board dts file.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 10:30:14 +02:00
Jernej Skrabec
ccefd95f64 ARM: dts: sun8i: r40: Add missing TCON-TOP - TCON connections
Current R40 is missing some graph connections between TCON TOP and
TCONs.

Add them.

Fixes: 05a43a262d ("ARM: dts: sun8i: r40: Add HDMI pipeline")

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 10:29:57 +02:00
Jernej Skrabec
f9105d819d ARM: dts: sun8i: r40: Remove fallback compatible for TCON TV
A83T and R40 TCON TV are very similar. However, R40 TCON TV is wired
differently, which makes it incompatible with A83T TCON TV.

Because of that, remove fallback A83T TCON TV compatible.

Fixes: 05a43a262d ("ARM: dts: sun8i: r40: Add HDMI pipeline")

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 10:29:43 +02:00
Jernej Skrabec
e64cb21c05 ARM: dts: sun8i: r40: Add mixer ids to TCON TOP
sun4i-drm DT binding, second paragraph of the first section says:

For all connections between components up to the TCONs in the display
pipeline, when there are multiple components of the same type at the
same depth, the local endpoint ID must be the same as the remote
component's index.

Add mixer ids in R40 DT as mandated by DT binding.

Fixes: 05a43a262d ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 10:29:24 +02:00
Jernej Skrabec
20d85508b8 ARM: dts: sun8i: r40: Remove fallback display engine compatible
R40 has pretty unique display pipeline. Because of that, H3 display
engine compatible fallback should be removed.

Fixes: 05a43a262d ("ARM: dts: sun8i: r40: Add HDMI pipeline")

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11 10:29:00 +02:00
Suzuki K Poulose
7dfc8db1d1 arm_pmu: Tidy up clear_event_idx call backs
The armpmu uses get_event_idx callback to allocate an event
counter for a given event, which marks the selected counter
as "used". Now, when we delete the counter, the arm_pmu goes
ahead and clears the "used" bit and then invokes the "clear_event_idx"
call back, which kind of splits the job between the core code
and the backend. To keep things tidy, mandate the implementation
of clear_event_idx() and add it for exisiting backends.
This will be useful for adding the chained event support, where
we leave the event idx maintenance to the backend.

Also, when an event is removed from the PMU, reset the hw.idx
to indicate that a counter is not allocated for this event,
to help the backends do better checks. This will be also used
for the chain counter support.

Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-07-10 18:19:02 +01:00
Suzuki K Poulose
3a95200d3f arm_pmu: Change API to support 64bit counter values
Convert the {read/write}_counter APIs to handle 64bit values
to enable supporting chained event counters. The backends still
use 32bit values and we pass them 32bit values only. So in effect
there are no functional changes.

Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-07-10 18:19:02 +01:00
Suzuki K Poulose
8d3e994241 arm_pmu: Clean up maximum period handling
Each PMU defines their max_period of the counter as the maximum
value that can be counted. Since all the PMU backends support
32bit counters by default, let us remove the redundant field.

No functional changes.

Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-07-10 18:19:02 +01:00
Faiz Abbas
0adbe832f2 ARM: dts: dra76x: Add MCAN node
Add support for the MCAN peripheral which supports both classic
CAN messages along with the new CAN-FD message.

Add MCAN node to evm and enable it with a maximum datarate of 5 mbps

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-10 04:05:30 -07:00
Faiz Abbas
09a070a369 ARM: dts: Add generic interconnect target module node for MCAN
The ti-sysc driver provides support for manipulating the idle modes
and interconnect level resets.

Add the generic interconnect target module node for MCAN to support
the same.

CC: Tony Lindgren <tony@atomide.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-10 04:05:30 -07:00
Lokesh Vutla
6ae8d5c1a8 ARM: dts: dra762: Add MCAN clock support
MCAN is clocked by H14 divider of DPLL_GMAC. Unlike other
DPLL dividers this DPLL_GMAC H14 divider is controlled by
control module. Adding support for these clocks.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-10 04:05:30 -07:00
Bartosz Golaszewski
7f69ae7fad ARM: davinci: unduplicate aemif support
All users now register platform devices using the ti-aemif driver.
Remove the handcrafted aemif API.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-07-10 15:39:27 +05:30
Bartosz Golaszewski
acc0fb43c6 ARM: davinci: mityomapl138: use aemif platform driver
We now support board files in the aemif driver. Register a platform
device instead of using the handcrafted API in mityomapl138.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-07-10 15:39:27 +05:30
Bartosz Golaszewski
59a2180298 ARM: davinci: dm646x-evm: use aemif platform driver
We now support board files in the aemif driver. Register a platform
device instead of using the handcrafted API in dm646x-evm.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-07-10 15:39:27 +05:30
Bartosz Golaszewski
aa88d25d52 ARM: davinci: da830-evm: use aemif platform driver
We now support board files in the aemif driver. Register a platform
device instead of using the handcrafted API in da830-evm.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-07-10 15:39:27 +05:30
Bartosz Golaszewski
2ee2948e87 ARM: davinci: dm644x-evm: use aemif platform driver
We now support board files in the aemif driver. Register a platform
device instead of using the handcrafted API in dm644x-evm.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-07-10 15:39:27 +05:30
Bartosz Golaszewski
8c03a8889b ARM: davinci: dm365-evm: use the ti-aemif soc driver
We now support board files in the aemif driver. Register a platform
device instead of using the handcrafted API in dm365-evm.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-07-10 15:39:27 +05:30
Bartosz Golaszewski
d51626ce5f ARM: davinci: da850-evm: use aemif platform driver in legacy mode
We now support board files in the aemif driver. Register a platform
device instead of using the handcrafted API in da850-evm.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-07-10 15:39:27 +05:30
Bartosz Golaszewski
92eb49089c ARM: davinci: omapl138-hawk: add aemif & nand support
We now have support for aemif & nand from board files. As an example
add support for nand to da850-hawk.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-07-10 15:39:27 +05:30
Sekhar Nori
3117c17301 ARM: dts: da850: Add power-domains to CPPI 4.1 node
This adds the power-domains property to CPPI 4.1 node.

The CPPI 4.1 DMA driver uses pm_runtime to manage the clocks,
so it needs this property in order to find and enable the clock
properly.

Reviewed-by: David Lechner <david@lechnology.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-07-10 15:32:41 +05:30
Keerthy
8c5a916f4c ARM: OMAP2+: sleep33/43xx: Add RTC-Mode support
Add support for RTC mode to low level suspend code. This includes
providing the rtc base address for the assembly code to configuring the
PMIC_PWR_EN line late in suspend to enter RTC+DDR mode.

Note: This patch also fold in left out space parameter for
am33xx_emif_sram_table and am43xx_emif_sram_table

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-09 23:01:34 -07:00
Dave Gerlach
74655749a5 ARM: OMAP2+: sleep33/43xx: Make sleep actions configurable
Add an argument to the sleep33xx and sleep43xx code to allow us to set
flags to determine which portions of the code get called in order to use
the same code for multiple power saving modes. This patch allows us to
decide whether or not we flush and disable caches, save EMIF context,
put the memory into self refresh and disable the EMIF, and/or invoke
the wkup_m3 when entering into WFI.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-09 23:01:34 -07:00
Andy Shevchenko
eb07fe9f9f ARM: OMAP2+: reuse DEFINE_SHOW_ATTRIBUTE() macro
Reuse DEFINE_SHOW_ATTRIBUTE() macro instead of open coding file
operations followed by custom ->open() callbacks per each attribute.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-09 22:58:06 -07:00
Arnd Bergmann
4d58e7034d ARM: module: fix modsign build error
The asm/module.h header file can not be included standalone, which
breaks the module signing code after a recent change:

In file included from kernel/module-internal.h:13,
                 from kernel/module_signing.c:17:
arch/arm/include/asm/module.h:37:27: error: 'struct module' declared inside parameter list will not be visible outside of this definition or declaration [-Werror]
 u32 get_module_plt(struct module *mod, unsigned long loc, Elf32_Addr val);

This adds a forward declaration of struct module to make it all work.

Fixes: f314dfea16 ("modsign: log module name in the event of an error")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jessica Yu <jeyu@kernel.org>
2018-07-09 20:29:49 +02:00
Stefan Agner
5def854e37 ARM: dts: tegra: enable NAND flash on Colibri T20
This enables the on-module ONFI conformant NAND flash.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-09 18:51:01 +02:00
Lucas Stach
6c468f1098 ARM: dts: tegra: add Tegra20 NAND flash controller node
Add basic controller device tree node to be extended by
individual boards. Use the assigned-clocks mechanism to set
NDFLASH clock to a sensible default rate of 150MHz.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-09 18:51:01 +02:00
Krzysztof Kozlowski
8ab11f8068 ARM: tegra: Work safely with 256 MB Colibri-T20 modules
Colibri-T20 can come in 256 MB RAM (with 512 MB NAND) or 512 MB RAM
(with 1024 MB NAND) flavors.  Both of them will use the same DTSI
expecting the bootloader to do the fixup of /memory node.  However in
case it does not happen, let's stay on safe side by limiting the memory
to 256 MB for both versions of Colibri-T20.

Rename to remove the unnecessary memory size from the device tree file
name.  While at it, also follow the typical Toradex SoC, module, carrier
board hierarchy.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-09 18:50:53 +02:00
Krzysztof Kozlowski
35a21229f8 ARM: tegra: Fix unit_address_vs_reg and avoid_unnecessary_addr_size DTC warnings
Remove unneeded address/size cells properties and unit addresses to fix
DTC warnings like:

    arch/arm/boot/dts/tegra30-apalis-eval.dtb: Warning (unit_address_vs_reg):
        /i2c@7000d000/stmpe811@41/stmpe_touchscreen@0: node has a unit name, but no reg property
    arch/arm/boot/dts/tegra30-apalis-eval.dtb: Warning (avoid_unnecessary_addr_size):
        /i2c@7000d000/stmpe811@41: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-09 18:50:33 +02:00
Krzysztof Kozlowski
482997699e ARM: tegra: Fix unit_address_vs_reg DTC warnings for /memory
Add a generic /memory node in each Tegra DTSI (with empty reg property,
to be overidden by each DTS) and set proper unit address for /memory
nodes to fix the DTC warnings:

    arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg):
        /memory: node has a reg or ranges property, but no unit name

The DTB after the change is the same as before except adding
unit-address to /memory node.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-09 18:50:10 +02:00
Krzysztof Kozlowski
f48ba1ae6a ARM: tegra: Remove usage of deprecated skeleton.dtsi
Remove the usage of skeleton.dtsi because it was deprecated since commit
9c0da3cc61 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated").
It also allows later to fix DTC warnings for missing unit name in
/memory nodes.

Compiled DTBs are the same as before this commit.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-09 18:49:44 +02:00
Florian Fainelli
3be77fe8c3 Merge tag 'bcm2835-dt-next-2018-07-03' into devicetree/next
This pull request brings in a board DT for the Raspberry Pi Compute
Module and its I/O board, the Pi3's PMU node, and the display's
transposer block.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-07-09 08:12:15 -07:00
Vivek Unune
2bebdfcdcd ARM: dts: BCM5301X: Add support for Linksys EA9500
Hardware Info
-------------

Processor	- Broadcom BCM4709C0KFEBG dual-core @ 1.4 GHz
Switch		- BCM53012 in BCM4709C0KFEBG & external BCM53125
DDR3 RAM	- 256 MB
Flash		- 128 MB (Toshiba TC58BVG0S3HTA00)
2.4GHz		- BCM4366 4×4 2.4/5G single chip 802.11ac SoC
Power Amp	- Skyworks SE2623L 2.4 GHz power amp (x4)
5GHz x 2	- BCM4366 4×4 2.4/5G single chip 802.11ac SoC
Power Amp	- PLX Technology PEX8603 3-lane, 3-port PCIe switch
Ports		- 8 Ports, 1 WAN Ports
Antennas	- 8 Antennas
Serial Port	- @J6 [GND,TX,RX] (VCC NC)    115200 8n1

Tested with OpenWrt built with DSA driver and Kernel v4.14

Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-07-09 08:12:13 -07:00
Rafał Miłecki
a21e754843 ARM: dts: BCM53573: Add architected timer
It's a standard ARM architected timer that was simply missed when
initially adding this .dtsi file.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-07-09 08:12:12 -07:00
Vivek Unune
37f6130ec3 ARM: dts: BCM5301X: Make USB 3.0 PHY use MDIO PHY driver
Currently, the USB 3.0 PHY in bcm5301x.dtsi uses platform driver which
requires register range "ccb-mii" <0x18003000 0x1000>. This range
overlaps with MDIO cmd and param registers (<0x18003000 0x8>).
Essentially, the platform driver partly acts like a MDIO bus driver,
hence to use of this register range.

In some Northstar devices like Linksys EA9500, secondary switch is
connected via external MDIO. The only way to access and configure the
external switch is via MDIO bus. When we enable the MDIO bus in it's
current state, the MDIO bus and any child buses fail to register because
of the register range overlap.

On Northstar, the USB 3.0 PHY is connected at address 0x10 on the
internal MDIO bus. This change moves the usb3_phy node and makes it a
child node of internal MDIO bus.

Thanks to Rafał Miłecki's commit af850e14a7 ("phy: bcm-ns-usb3: add
MDIO driver using proper bus layer") the same USB 3.0 platform driver
can now act as USB 3.0 PHY MDIO driver.

Tested on Linksys Panamera (EA9500)

Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-07-09 08:12:11 -07:00
Mohamed Ismail Abdul Packir Mohamed
a08e950de6 ARM: dts: cygnus: enable iproc-hwrng
Enable the HW rng driver "iproc-rng200" for all cygnus platforms.

Signed-off-by: Mohamed Ismail Abdul Packir Mohamed <mohamed-ismail.abdul@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Tested-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-07-09 08:12:10 -07:00
Clément Péron
00d1ae3840 ARM: dts: cygnus: add ethernet0 alias
In order to avoid Linux generating a random mac address on every boot,
add an ethernet0 alias that will allow u-boot to patch the dtb with
the MAC address.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-07-09 08:12:01 -07:00
Boris Brezillon
b7dd29b401 ARM: dts: bcm283x: Add Transposer block
The transposer block is allowing one to write the result of the VC4
composition back to memory instead of displaying it on a screen.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
2018-07-09 08:10:20 -07:00