Wolfram Sang
cdbfaf640a
ARM: dts: convert to SPDX identifier for Renesas boards
...
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com >
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com >
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2018-07-23 13:33:03 +02:00
Biju Das
0ed33948cb
ARM: dts: iwg20d-q7-common: Sound DMA support via DVC on DTS
...
DMA transfer uses DVC
DMA DMApp
[MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI]
Signed-off-by: Biju Das <biju.das@bp.renesas.com >
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com >
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-12-20 12:52:37 +01:00
Biju Das
b4b2094511
ARM: dts: iwg20d-q7-common: Sound DMA support via SRC on DTS
...
DMA transfer to/from SRC
DMA DMApp
[MEM] -> [SRC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [SRC] <- [SSIU] <- [SSI]
Current sound driver is supporting SSI/SRC random connection.
So, this patch is trying
SSI1 -> SRC3
SSI0 <- SRC2
Signed-off-by: Biju Das <biju.das@bp.renesas.com >
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com >
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-12-20 12:52:36 +01:00
Biju Das
354cce5a1c
ARM: dts: iwg20d-q7-common: Sound DMA support via BUSIF on DTS
...
DMA transfer to/from SSIU
DMA
[MEM] -> [SSIU] -> [SSI]
DMA
[MEM] <- [SSIU] <- [SSI]
Signed-off-by: Biju Das <biju.das@bp.renesas.com >
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com >
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-12-20 12:52:35 +01:00
Biju Das
eeecf0b2a0
ARM: dts: iwg20d-q7-common: Sound DMA support on DTS
...
DMA transfer to/from SSI
DMA
[MEM] -> [SSI]
DMA
[MEM] <- [SSI]
Signed-off-by: Biju Das <biju.das@bp.renesas.com >
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com >
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-12-20 12:52:35 +01:00
Biju Das
cfa2e2f7cf
ARM: dts: iwg20d-q7-common: Sound PIO support
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Enable sound PIO support on carrier board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com >
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com >
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-12-20 12:52:34 +01:00
Biju Das
3091626868
ARM: dts: iwg20d-q7-common: Enable SGTL5000 audio codec
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This patch enables SGTL5000 audio codec on the carrier board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com >
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-12-20 12:52:33 +01:00
Biju Das
b3a0317e31
ARM: dts: iwg20d-q7: Enable PCIe Controller
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Enable PCIe Controller & set PCIe bus clock frequency.
Signed-off-by: Biju Das <biju.das@bp.renesas.com >
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-11-27 11:40:24 +01:00
Fabrizio Castro
47f3c7b66b
ARM: dts: iwg20d-q7-common: Add can0 support to carrier board
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This patch enables CAN0 interface exposed through connector J20 on the
carrier board.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com >
Reviewed-by: Biju Das <biju.das@bp.renesas.com >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-11-27 11:40:19 +01:00
Fabrizio Castro
77014a7c65
ARM: dts: iwg20d-q7: Add support for ttySC3
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Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com >
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com >
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-11-27 11:40:09 +01:00
Biju Das
405b580227
ARM: dts: iwg20d-q7: Enable HS-USB
...
Enable HS-USB device for the iWave G20D-Q7 carrier board based on
RZ/G1M.
Also disable the host mode support on usb otg port by default to avoid
pin conflicts.
Signed-off-by: Biju Das <biju.das@bp.renesas.com >
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com >
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-10-12 13:45:49 +02:00
Fabrizio Castro
4f0b2563c4
ARM: dts: iwg20d-q7: Rework DT architecture
...
Since the same carrier board may host RZ/G1M and RZ/G1N based
Systems on Module, the DT architecture for iwg20d-q7 needs
better decoupling. This patch provides:
* iwg20d-q7-common.dtsi - its purpose is to define the carrier
board definitions, and its content is basically the same
as the previous version of r8a7743-iwg20d-q7.dts, only it
has no reference to the SoM .dtsi, and that's why the
filename doesn't mention the SoC name any more.
* r8a7743-iwg20d-q7.dts - its new purpose is to put together
the SoM .dtsi (r8a7743-iwg20m.dtsi) and the carrier board
.dtsi defined by this very patch, along with "model" and
"compatible" properties.
The final DT architecture to describe the board is now:
r8a7743-iwg20d-q7.dts # Carrier Board + SoM
├── r8a7743-iwg20m.dtsi # SoM
│ └── r8a7743.dtsi # SoC
└── iwg20d-q7-common.dtsi # Carrier Board
and maximizes the reuse of the definitions for the carrier board
and for the SoM.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com >
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com >
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be >
Signed-off-by: Simon Horman <horms+renesas@verge.net.au >
2017-10-09 09:28:43 +02:00