Commit Graph

8 Commits

Author SHA1 Message Date
Linus Walleij
f946738ca8 ARM: 6331/1: ux500 cpu/SoC version macros v2
This patch adds support for checking if the digital baseband (DB)
System-on-Chip (aka "cpu) ASIC hardware version is 1.0, 1.1 or
2.0. We print the result in the bootlog, the functions are then
used for runtime decisions based on hardware version.

Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-09-02 15:46:19 +01:00
Rabin Vincent
591d8dd71c ARM: 6090/1: ux500: add U5500 support
Add basic support for the U5500 platform.

Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-04 17:50:06 +01:00
Rabin Vincent
c9c0957286 ARM: 6078/1: ux500: add per-SoC register definitions
Split up all the hardware register definitions previously found in
hardware.h into per-SoC files db8500-regs.h and db5500-regs.h.  Rename a
couple of macros to prepare for sharing code between the variants.

Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-04 17:50:01 +01:00
Rabin Vincent
f38406bbfc ARM: 6077/1: ux500: add SOC Kconfig variables
This adds the different config options for SoCs DB8500 and DB5500 and
refines the SoC/CPU detection code to support the DB5500 as well via
these.  The selection between DB5500 and DB8500 is currently a simple
compile-time choice.

Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-04 17:50:00 +01:00
Rabin Vincent
94bdc0e2d7 ARM: 5973/1: ux500: add gpio support
Add support for the GPIOs on the U8500, using the plat-nomadik GPIO
driver.

Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-19 18:29:45 +00:00
Rabin Vincent
75a36ee01e ARM: 5963/1: ux500: add support for u8500 v1 revision
Add cpu_is_u8500{ed/v1}() functions to determine the variant based on
the CPU id, add the changed peripheral addresses, and fixup the MTU
address.

Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-19 18:29:45 +00:00
Rabin Vincent
8d2b09f5b0 ARM: 5961/1: ux500: fix CLKRST addresses
Correct the base addresses of the CLKRST registers.

Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-07 10:24:25 +00:00
Srinidhi Kasagar
ffae4e014a ARM: 5829/1: ARM: U8500 register definitions
Adds register definitions, shared peripheral interrupt
numbers (SHPI) and IO mappings for the U8500 core support.
SHPI are assigned to [160:32] where first 32 interrupts
are reserved.

Reviewed-by: Alessandro Rubin <rubini@unipv.it>
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:51 +00:00