The DSP can have more than one cores. In that case the secondary
core has to be managed by the driver. This patch adds the changes
to driver infrastructure to support multiple core.
A new object skl_dsp_cores is introduced to support multiple
core. Helpers skl_dsp_get_core() skl_dsp_put_core() help to
managed the cores.
Many of the power_up/down and DSP APIs take additional argument
of core_id. The primary core, 0 is always powered up first and
then on demand second core.
Signed-off-by: Jayachandran B <jayachandran.b@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The stall bits needs to comprehend the number of DSP cores
running, so update the stall and unstall register writes to
comprehend SKL_DSP_CORES_MASK values as well.
Signed-off-by: Jayachandran B <jayachandran.b@intel.com>
Signed-off-by: Ramesh Babu <ramesh.babu@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Broxton needs to send Purge firmware IPC to DSP before downloading the
firmware. The DMA id needs to be updated for that.
While at it also update Broxton boot sequence to send purge request after
power up and before yanking off reset.
Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
If request firmware fails at init, the code loader DMA allocation
can be NULL, so check for boot complete before freeing up these
resources
Signed-off-by: Dharageswari R <dharageswari.r@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
We are supposed to freeup the Code loader DMA allocation and
ensure all interrupts are disabled before we disable dsp cores.
So invoke these to ensure DSP shuts down properly.
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Some double whitespaces issues existed in driver, so fix them up.
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Like we have in legacy mode HDA driver, we need to check the
status bit and handle interrupt only when it is not zero or all
bits set. We typically see the status as all 1's when controller
resumes from suspend, So add the check here as well and don't
handle for these cases.
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Skylake driver will set the SPA bit to 0 to turn off the DSP core.
Driver will poll the Current Power Active (CPA) bit to match the
Set Power Active (SPA) bit value. When CPA bit matches the value
of SPA bit, the achieved power state has reached.
In case of DSP power down, register that was polled is SPA
instead of CPA. This patch corrects the register to be polled
in case of DSP power down.
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The code loader DMA interrupt is received by main interrupt handler which
dispatches it to cldma routines
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>