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32999 Commits

Author SHA1 Message Date
Eric Huang
f715d5b357 drm/amd/powerplay: add mclk OD(overdrive) support for Tonga 
The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:56 -04:00
Eric Huang
40899d5529 drm/amdgpu: add mclk OD(overdrive) support for CI 
The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:56 -04:00
Eric Huang
f2bdc05f77 drm/amdgpu: add the common code to support mclk OD 
This implements mclk OverDrive(OD) through sysfs.
The new entry pp_mclk_od is read/write. The value of input/output
is an integer of the overclocking percentage.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:55 -04:00
Huang Rui
6bb6b2972d drm/amdgpu: add powercontainment module parameter 
This patch makes powercontainment feature configurable. Currently, the
powercontainment is not very stable, so add a module parameter to
enable/disable it via user mode.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:55 -04:00
Christian König
c5f74f7802 drm/amdgpu: fix and cleanup job destruction 
Remove the job reference counting and just properly destroy it from a
work item which blocks on any potential running timeout handler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:54 -04:00
Christian König
f42d20a942 drm/amdgpu: move locking into the functions who need it 
Otherwise the locking becomes rather confusing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:53 -04:00
Christian König
0e51a772e2 drm/amdgpu: properly abstract scheduler timeout handling 
The driver shouldn't mess with the scheduler internals.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:53 -04:00
Christian König
1e24e31f22 drm/amdgpu: remove use_shed hack in job cleanup 
Remembering the code path in a variable to cleanup
differently is usually not a good idea at all.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:52 -04:00
Christian König
1ab0d211f3 drm/amdgpu: fix coding style in amdgpu_job_free 
Ther should be a new line between code and decleration.
Also use amdgpu_ib_free() instead of releasing the member manually.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:52 -04:00
Christian König
20df080da2 drm/amdgpu: remove duplicated timeout callback 
No need for double housekeeping here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:51 -04:00
Christian König
7392c329ee drm/amdgpu: remove begin_job/finish_job 
Completely pointless and confusing to use a callback
to call into the same code file.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:50 -04:00
Christian König
16a7133f35 drm/amdgpu: fix coding style in the scheduler v2 
v2: fix even more

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:50 -04:00
Eric Huang
3cc259112d drm/amdgpu: add the CI code to enable sclk OD(OverDrive) 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:49 -04:00
Eric Huang
19fbc43a86 drm/amdgpu: add the CI code to enable clock level selection 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:48 -04:00
Eric Huang
8b2e574dc4 drm/amdgpu: add the new common pm code to support sclk OD 
This extends OD (OverDrive) support to the non-Powerplay code paths.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:48 -04:00
Eric Huang
c85e299ff9 drm/amdgpu: add the new common pm code to select the clock levels 
This extends dpm clock level selection to the non-powerplay code paths.
This interface can be used to select individual clock levels.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:47 -04:00
Tom St Denis
9bf51b0719 drm/amdgpu/gfx8: Enable GFX PG on CZ 
Based on Alex's patches this enables GFX PG on CZ.

Tested with xonotic-glx/glxgears/supertuxkart and idle desktop.
Also read-back registers via umr for verificiation that the bits
are truly enabled.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:47 -04:00
Alex Deucher
7ba0eb6df9 drm/amdgpu/gfx8: clean up polaris11 PG enable 
Fix the logic for enabling/disabling.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:46 -04:00
Alex Deucher
2c54716563 drm/amdgpu/gfx8: add powergating support for CZ/ST 
This implements powergating support for CZ/ST asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:45 -04:00
Alex Deucher
6b0432b703 drm/amdgpu: add new GFX powergating types 
Add some new GFX powergating flags.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:45 -04:00
Alex Deucher
c2546f55dd drm/amdgpu/gfx8: rename some pg functions 
So they can be shared with other asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:44 -04:00
Alex Deucher
fb16007bf0 drm/amdgpu/gfx8: add state setup for CZ/ST GFX power gating 
This sets up the CP jump table and GDS buffer and sets the
PG state registers.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:44 -04:00
Alex Deucher
9406d216fe drm/radeon/gfx7: expand cp jt size to handle GDS as well 
The size needs to handle the CP JT and GDS.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:43 -04:00
Alex Deucher
e36091edd3 drm/amdgpu/gfx7: expand cp jt size to handle GDS as well 
The size needs to handle the CP JT and GDS.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:42 -04:00
Eric Huang
09a0426404 drm/amd/powerplay: add sclk OD support on Polaris10 
This implements sclk overdrive(OD) overclocking support for Polaris10,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:42 -04:00
Eric Huang
9ccd4e1346 drm/amd/powerplay: add sclk OD support on Tonga 
This implements sclk overdrive(OD) overclocking support for Tonga,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:41 -04:00
Eric Huang
decb5fb6f2 drm/amd/powerplay: add sclk OD support on Fiji 
This implements sclk overdrive(OD) overclocking support for Fiji,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:41 -04:00
Eric Huang
428bafa86c drm/amdgpu: add powerplay sclk OD support through sysfs (v2) 
Add a new sysfs entry pp_sclk_od to support sclk overdrive(OD) overclocking,
the entry is read/write, the value of input/output is an integer which is the
over percentage of the highest sclk.

v2: drop extra semicolon

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:40 -04:00
Alex Deucher
b2ea0dcd27 drm/radeon: load different smc firmware on some CI variants 
The power tables on some variants require different firmware.
This may fix stability issues on some newer CI parts.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=91880

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:39 -04:00
Alex Deucher
861c7fde47 drm/radeon: load different smc firmware on some SI variants 
The power tables on some variants require different firmware.
This may fix stability issues on some newer SI parts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:39 -04:00
Alex Deucher
2254c21982 drm/amdgpu: load different smc firmware on some CI variants 
The power tables on some variants require different firmware.
This fixes stability issues on some newer CI parts.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=91880

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:38 -04:00
Monk Liu
cc7d8c7979 drm/amdgpu: clear RB at ring init 
This help fix reloading driver hang issue of SDMA
ring.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:50:37 -04:00
Rodrigo Vivi
22dea0be50 drm/i915: Introduce Kabypoint PCH for Kabylake H/DT. 
Some Kabylake SKUs are going to use Kabypoint PCH.
It is mainly for Halo and DT ones.

>From our specs it doesn't seem that KBP brings
any change on the display south engine. So let's consider
this as a continuation of SunrisePoint, i.e., SPT+.

Since it is easy to get confused by a letter change:
KBL = Kabylake - CPU/GPU codename.
KBP = Kabypoint - PCH codename.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96826
Link: http://patchwork.freedesktop.org/patch/msgid/1467418032-15167-1-git-send-email-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2016-07-07 10:01:37 -07:00
Tim Gore
3485d99e41 drm/i915:gen9: implement WaMediaPoolStateCmdInWABB 
This patch applies WaMediaPoolStateCmdInWABB which fixes
a problem with the restoration of thread counts on resuming
from RC6.

References: HSD#2137167
Signed-off-by: Tim Gore <tim.gore@intel.com>
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1467709290-5941-1-git-send-email-tim.gore@intel.com
 2016-07-07 14:26:59 +01:00
Ville Syrjälä
e25148d01d drm/i915: Check for invalid cloning earlier during modeset 
Move the encoder cloning check to happen earlier in the modeset. The
main benefit will be that the debug output from a failed modeset will
be less confusing as output_types can not indicate an invalid
configuration during the later computation stages.

For instance, what happened to me was kms_setmode was attempting one
of its invalid cloning checks during which it asked for DP+VGA cloning
on HSW. In this case the DP .compute_config() was executed after
the FDI .compute_config() leaving the DP link clock (1.62 in this case)
in port_clock, and then later the FDI BW computation tried to use that
as the FDI link clock (which should always be 2.7). 1.62 x 2 wasn't
enough for the mode it was trying to use, and so it ended up rejecting
the modeset, not because of an invalid cloning configuration, but
because of supposedly running out of FDI bandwidth. Took me a while
to figure out what had actually happened.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-12-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:10:31 +03:00
Ville Syrjälä
3f1c928f92 drm/i915: Simplify hdmi_12bpc_possible() 
With the output_types bitmask there's no need to loop through
the encoders anymore when checking for HDMI+non-HDMI cloning.

v2: Use output_types bitmask
v3: Fix the logic to really check that there are no non-HDMI encoders

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> (v2)
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-11-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:10:24 +03:00
Ville Syrjälä
d7edc4e57b drm/i915: Kill has_dsi_encoder 
has_dsi_encoder was introduced to indicate that the pipe is driving
a DSI encoder. Now that we have the output_types bitmask that can
tell us the same thing, let's just kill has_dsi_encoder.

v2: Rebase, handle BXT DSI transcoder, rewrote commit message

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-10-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:10:20 +03:00
Ville Syrjälä
cca0502b9c drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/ 
INTEL_OUTPUT_DISPLAYPORT hsa been bugging me for a long time. It always
looks out of place besides INTEL_OUTPUT_EDP and INTEL_OUTPUT_DP_MST.
Let's just rename it to INTEL_OUTPUT_DP.

v2: Rebase

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-9-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:10:16 +03:00
Ville Syrjälä
2210ce7f53 drm/i915: Replace some open coded intel_crtc_has_dp_encoder()s 
A bunch of places still look for DP encoders manually. Just call
intel_crtc_has_dp_encoder(). Note that many of these places don't
look for EDP or DP_MST, but it's still fine to replace them because
* for audio we don't enable audio on eDP anyway
* the code that lack DP MST check is only for plaforms that
  don't support MST anyway

v2: Rebase

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-8-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:10:12 +03:00
Ville Syrjälä
37a5650b5b drm/i915: Kill has_dp_encoder from pipe_config 
Use the new output_types bitmask instead of has_dp_encoder.
To make it less oainlful provide a small helper
(intel_crtc_has_dp_encoder()) to do the bitsy stuff.

v2: Rebase

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-7-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:10:07 +03:00
Ville Syrjälä
3d6e9ee0e1 drm/i915: Replace manual lvds and sdvo/hdmi counting with intel_crtc_has_type() 
Since we now have the output_types bitmaks in the crtc state, there's no
need to iterate through all the encoders to see if an LVDS or SDVO/HDMI
encoder might be present.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-6-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:09:54 +03:00
Ville Syrjälä
2d84d2b367 drm/i915: Unify intel_pipe_has_type() and intel_pipe_will_have_type() 
With the introduction of the output_types mask, intel_pipe_has_type()
and intel_pipe_will_have_type() are basically the same thing. Replace
them with a new intel_crtc_has_type() (identical to
intel_pipe_will_have_type() actually).

v2: Rebase
v3: Make intel_crtc_has_type() static inline (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> (v2)
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-5-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:08:25 +03:00
Ville Syrjälä
253c84c82a drm/i915: Add output_types bitmask into the crtc state 
Rather than looping through encoders to see which encoder types
are being driven by the pipe, add an output_types bitmask into
the crtc state and populate it prior to compute_config and during
state readout.

v2: Determine output_types before .compute_config() hooks are called

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-4-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:08:18 +03:00
Ville Syrjälä
5aa5696962 drm/i915: Remove encoder type checks from MST suspend/resume 
Now that eDP encoders won't have can_mst==true, we can throw out
the encoder type checks from the MST suspend/resume paths.

Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-3-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:08:12 +03:00
Ville Syrjälä
f8e58ddf85 drm/i915: Don't mark eDP encoders as MST capable 
If we've determined that the encoder is eDP, we shouldn't try to use MST
on it. Or at least the code doesn't seem to expect that since there are
some type==DP checks in the MST code.

Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-2-git-send-email-ville.syrjala@linux.intel.com
 2016-07-07 13:08:04 +03:00
Dave Airlie
27c0b7419c Merge branch 'linux-4.7' of git://github.com/skeggsb/linux into drm-fixes 
Just one fix for a stupid thinko in a DP training pattern commit.

* 'linux-4.7' of git://github.com/skeggsb/linux:
  drm/nouveau/disp/sor/gf119: select correct sor when poking training pattern
 2016-07-07 12:40:12 +10:00
Rex Zhu
ab6bad05c8 drm/amd/powerplay: Update CKS on/ CKS off voltage offset calculation. 
As get the right evv voltage, update them to latest coefficients to
align with BB.

agd: squash in Slava's 32 bit build fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-06 17:56:31 -04:00
Rex Zhu
e5eb37170b drm/amd/powerplay: fix bug that get wrong polaris evv voltage. 
value is 32 bits for polaris, not 16.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-06 17:44:14 -04:00
Rex Zhu
4b2427605e drm/amd/powerplay: incorrectly use of the function return value 
'0' means true.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2016-07-06 17:43:59 -04:00
Huang Rui
1dfefee893 drm/amd/powerplay: fix incorrect voltage table value for tonga 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2016-07-06 16:16:43 -04:00