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2668 Commits

Author SHA1 Message Date
Christian König
25a595e482 drm/amdgpu: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:42 -04:00
Alex Deucher
67ed009232 drm/amdgpu: retry dcpd fetch 
Retry the dpcd fetch several times.  Some eDP panels
fail several times before the fetch is successful.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=73530

Ported from radeon.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:41 -04:00
Alex Deucher
7af93b5069 drm/amdgpu: simplify DPCD debug output 
Use %*ph rather than walking the array.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:41 -04:00
Alex Deucher
dc5f428d61 drm/amdgpu: make some DP parameters const 
Ported from similar radeon patch.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:40 -04:00
Alex Deucher
9e14c65c57 drm/amdgpu: take the mode_config mutex when handling hpds 
Since we may modify display state.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:39 -04:00
Marek Olšák
d94aed5a6c drm/amdgpu: add and implement the GPU reset status query 
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-06-03 21:03:39 -04:00
Alex Deucher
1f8d962513 drm/amdgpu: add some new tonga pci ids 
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:38 -04:00
Alex Deucher
fb4f173734 drm/amdgpu: add new bonaire pci id 
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:37 -04:00
Jammy Zhou
86c2b79062 drm/amdgpu: rewording some left radeons 
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-06-03 21:03:36 -04:00
Jammy Zhou
c65444fe05 drm/amdgpu: switch to amdgpu folder for firmware files v2 
v2: keep using radeon folder for CIK

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-06-03 21:03:36 -04:00
Jammy Zhou
4b095304ea drm/amdgpu: do necessary NULL check 
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-06-03 21:03:35 -04:00
Jammy Zhou
02b70c8c9f drm/amdgpu: expose the max virtual address 
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-06-03 21:03:34 -04:00
Christian König
3cb485f340 drm/amdgpu: fix context switch 
Properly protect the state and also handle submission failures.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
 2015-06-03 21:03:34 -04:00
Christian König
d919ad49ac drm/amdgpu: fix dereference before check 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
 2015-06-03 21:03:33 -04:00
Christian König
d2edb07b10 drm/amdgpu: cleanup HDP flush handling 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
 2015-06-03 21:03:32 -04:00
Christian König
66782cec7a drm/amdgpu: always emit GDS switch 
Otherwise a process can access the GDS data of another process.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
 2015-06-03 21:03:31 -04:00
Jammy Zhou
aa2bdb2476 drm/amdgpu: add CE preamble flag v3 
The CE preamble IB can be dropped for the same context

v2: use the flags directly
v3: remove 'CE' for potential preamble usage by other rings

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-06-03 21:03:31 -04:00
Jammy Zhou
de807f818b drm/amdgpu: add flags for amdgpu_ib structure 
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-06-03 21:03:30 -04:00
Jammy Zhou
72efa7ebde drm/amdgpu: check context id for context switching (v2) 
check the filp is not robust, and sometimes different contexts may
have same filp value.

v2: check both filp and ctx_id

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-06-03 21:03:29 -04:00
Jammy Zhou
66b3cf2ab3 drm/amdgpu: add ctx_id to the WAIT_CS IOCTL (v4) 
It is required to support fence per context.

v2: add amdgpu_ctx_get/put
v3: improve get/put
v4: squash hlock fix

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-06-03 21:03:29 -04:00
Jack Xiao
74a5d1656e drm/amdgpu: allow unaligned memory access (v2) 
Set up the CP and SDMA for proper unaligned memory access.
Required for OpenCL 2.x

v2: udpate commit message

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-06-03 21:03:28 -04:00
Marek Olšák
0147ee0f59 drm/amdgpu: make the CTX ioctl thread-safe 
The existing locks were protecting the list, but not the elements.

v2: rename hlock to lock

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-06-03 21:03:27 -04:00
Marek Olšák
f11358daa9 drm/amdgpu: remove unsafe context releasing 
If ctx was released between put and get, then "get" would crash.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-06-03 21:03:27 -04:00
Christian König
a961ea7349 drm/amdgpu: fix userptr lockup 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
 2015-06-03 21:03:26 -04:00
monk.liu
dd08fae1e9 drm/amdgpu: fix userptr BO unpin bug (v2) 
sg could point to array of contigiouse page*, only free page could lead
to memory leak.

v2: use iterator

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:25 -04:00
Jammy Zhou
886712881d drm/amdgpu: remove AMDGPU_GEM_CREATE_CPU_GTT_UC 
This flag isn't used by user mode drivers, remove it to avoid
confusion. And rename GTT_WC to GTT_USWC to make it clear.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:24 -04:00
Sonny Jiang
46651cc5db drm/amdgpu fix amdgpu.dpm=0 (v2) 
Fix crash when disabling dpm.

v2: agd5f: fix coding style, cleanup commit message

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:24 -04:00
Alex Deucher
c92b90ccc2 drm/amdgpu: memset gds_info struct in info ioctl 
Avoids possibility that info may leak via the uninitialized
_pad element.

Noticed-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:23 -04:00
Alex Deucher
1045745742 drm/amdgpu: fix error handling in cz_dpm_hw_fini/cz_dpm_suspend 
Need to unlock the mutex on error.

Noticed-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:22 -04:00
monk.liu
decee87a88 drm/amdgpu: let bo_list handler start from 1 
this could prevent mis-understanding, because libdrm side will consider
no bo_list created if handleis zero

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:22 -04:00
monk.liu
840d51445f drm/amdgpu: fix bug occurs when bo_list is NULL 
Still need to handle ibs BO and validate them even bo_list is NULL

Signed-off-by: Monk.Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:21 -04:00
Jack Xiao
7ab7e8a409 drm/amdgpu: fix error check issue in amdgpu_mn_invalidate_range_start 
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:20 -04:00
Alex Deucher
2d8bd23a05 drm/amdgpu: drop ttm two ended allocation 
amdgpu_bo_create() calls amdgpu_ttm_placement_from_domain()
before ttm_bo_init() is called.  amdgpu_ttm_placement_from_domain()
uses the ttm bo size to determine when to select top down
allocation but since the ttm bo is not initialized yet the
check is always false.  It only took affect when buffers
were validated later.  It also seemed to regress suspend
and resume on some systems possibly due to it not
taking affect in amdgpu_bo_create().

amdgpu_bo_create() and amdgpu_ttm_placement_from_domain()
need to be reworked substantially for this to be optimally
effective.  Re-enable it at that point.

Ported from radeon commit:
a239118a24

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-06-03 21:03:20 -04:00
Alex Deucher
1256a8b89e drm/amdgpu: add VI pci ids 
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:19 -04:00
Alex Deucher
89330c391b drm/amdgpu: add CIK pci ids 
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:18 -04:00
Alex Deucher
aaa36a976b drm/amdgpu: Add initial VI support 
This adds initial support for VI asics.  This
includes Iceland, Tonga, and Carrizo.  Our inital
focus as been Carrizo, so there are still gaps in
support for Tonga and Iceland, notably power
management.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:17 -04:00
Alex Deucher
a2e73f56fa drm/amdgpu: Add support for CIK parts 
This patch adds support for CIK parts.  These parts
are also supported by radeon which is the preferred
option, so there is a config option to enable support
for CIK parts in amdgpu for testing.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:17 -04:00
Alex Deucher
18da4340e6 drm/amdgpu: Do not directly dereference pointers to BIOS area. 
Use readb() and memcpy_fromio() accessors instead.

Ported from radeon commit:
f2c9e560b4

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:16 -04:00
Alex Deucher
17b10f941f drm/amdgpu: fix const warnings in amdgpu_connectors.c 
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:15 -04:00
Alex Deucher
d38ceaf99e drm/amdgpu: add core driver (v4) 
This adds the non-asic specific core driver code.

v2: remove extra kconfig option
v3: implement minor fixes from Fengguang Wu
v4: fix cast in amdgpu_ucode.c

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:15 -04:00
Alex Deucher
97b2e202fb drm/amdgpu: add amdgpu.h (v2) 
This is the main header file for amdgpu.

v2: remove stable comments

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:14 -04:00
Alex Deucher
8a94f39580 drm/amdgpu: add amdgpu_family.h 
This header defines asic families and attributes.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:13 -04:00
Alex Deucher
b111f7e4d2 drm/amdgpu: add ppsmc.h 
This header provides the smc message interface for the driver.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:13 -04:00
Alex Deucher
bd098eb0ee drm/amdgpu: add clearstate_defs.h 
This header provides for format for the GCA blocks
clear state (i.e., default state).  Each GCA version
has a specific clear state.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:12 -04:00
Alex Deucher
a02860aa2b drm/amdgpu: add atombios headers 
These headers define the atombios table structure and
driver interface.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:11 -04:00
Alex Deucher
c481a6802e drm/amdgpu: add VCE 3.0 register headers 
These are register headers for the VCE (Video Codec Engine)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:10 -04:00
Alex Deucher
683595a6f3 drm/amdgpu: add VCE 2.0 register headers 
These are register headers for the VCE (Video Codec Engine)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:09 -04:00
Alex Deucher
3b1e08cb29 drm/amdgpu: add UVD 6.0 register headers 
These are register headers for the UVD (Universal Video Decoder)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:08 -04:00
Alex Deucher
7aa27c3773 drm/amdgpu: add UVD 5.0 register headers 
These are register headers for the UVD (Universal Video Decoder)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:08 -04:00
Alex Deucher
8630f839e0 drm/amdgpu: add UVD 4.2 register headers 
These are register headers for the UVD (Universal Video Decoder)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:07 -04:00