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2668 Commits

Author SHA1 Message Date
Christian König
2bd9ccfa75 drm/amdgpu: use per VM entity for page table updates (v2) 
Updates from different VMs can be processed independently.

v2: agd: rebase on upstream

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-12 15:35:16 -05:00
Christian König
c41d271d75 drm/amdgpu: remove the userptr rmn->lock 
Avoid a lock inversion problem by just using the mmap_sem to
protect the entries of the intervall tree.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
 2016-02-12 15:32:07 -05:00
Harry Wentland
e7813d0cd8 drm/amd/include: Update dce 8 headers for dal 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-12 15:31:47 -05:00
Tom St Denis
5cb60bf697 drm/amdgpu/gfx7: Fix whitespace 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-12 15:31:04 -05:00
Tom St Denis
7edd6b2faa drm/amdgpu/gfx7: Simplify wptr/rptr functions 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-12 15:30:26 -05:00
Tom St Denis
6d1d683181 drm/amdgpu/gfx7: LOC reduction in gfx_v7_0_setup_rb 
Reduce for loop with bitmask to simple complement and mask

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-12 15:29:47 -05:00
Tom St Denis
d3a7207bdb drm/amdgpu/gfx7: Simplify bitmask creation 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-12 15:27:46 -05:00
Tom St Denis
840a20d31b drm/amdgpu/gfx7: Reduce linecount in table init 
Replaces switch statements with direct assignments to
reduce line count significantly.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-12 15:27:34 -05:00
Rex Zhu
fa9e699105 drm/amd/powerplay: add powerplay valid check to avoid null point. 
In case CONFIG_DRM_AMD_POWERPLAY is defined and amdgpu.powerplay=0.
some functions in powrplay can also be called by DAL. and the input parameter is *adev.
if just check point not NULL was not enough and will lead to NULL point error.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:21:12 -05:00
Eric Yang
0f18563aaa drm/amd/powerplay: Enable low mem pstate when cancel_high 
Signed-off-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:19:29 -05:00
Eric Yang
5952c75b41 drm/amd/powerplay: Use correct clock in cz_apply_state_adjust_rules 
Signed-off-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Eagle Yeh <eagle.yeh@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:17:01 -05:00
Rex Zhu
ff5e20c2a0 drm/amd/powerplay: get real display device num by cgs interface 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:16:23 -05:00
Vitaly Prosyak
58c3ce23c9 drm/amd/powerplay: Use engine clock limit calculated by dal 
Use min required system clock calculated by dal

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:14:57 -05:00
David Rokhvarg
155f1127ce drm/amd/powerplay: Make declarations of functions exposed to DAL type-safe. 
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:13:59 -05:00
Rex Zhu
f1232c6136 drm/amd/powerplay: implement functions in carrizo for DAL. 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:13:25 -05:00
Rex Zhu
e273b04117 drm/amd/powerplay: export interface to DAL. 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:12:23 -05:00
Rex Zhu
47329134ae drm/amd/powerplay: change struct name. 
amd_pp_dal_clock_info to amd_pp_simple_clock_info.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:11:04 -05:00
Harry Wentland
781095f903 drm/amd: Adding IVSRC register headers 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:09:04 -05:00
Vitaly Prosyak
6bd9e877ce drm/amdgpu: Move MMIO flip out of spinlocked region 
Prior actual  MMIO flip we need to acquire DAL mutex to guard
our target state which get modified on reset mode.
Assign page flip status before actual flip to handle
the possible race condition with interrupt.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:08:55 -05:00
Harry Wentland
9ddf940f5d drm/amdgpu: Don't crash system if we can't get crtc 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 16:08:40 -05:00
Christian König
e86f9ceee1 drm/amdgpu: move sync into job object 
No need to keep that for every IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:24 -05:00
Christian König
9f2ade33e6 drm/amdgpu: send VCE IB tests directly to the ring again 
We need the IB test for GPU resets as well and
the scheduler should be stoped then.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:24 -05:00
Christian König
d7af97dbcc drm/amdgpu: send UVD IB tests directly to the ring again 
We need the IB test for GPU resets as well and
the scheduler should be stoped then.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:23 -05:00
Christian König
0856cab1a6 drm/amdgpu: rename amdgpu_sched.c to amdgpu_job.c 
That's probably a better matching name.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:23 -05:00
Christian König
d71518b5aa drm/amdgpu: cleanup in kernel job submission 
Add a job_alloc_with_ib helper and proper job submission.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:22 -05:00
Christian König
a0332b56f6 drm/amdgpu: send SDMA/GFX IB tests directly to the ring again 
There is no point in sending them through the scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:22 -05:00
Christian König
ec72b8006c drm/amdgpu: directly return fence from ib_schedule 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:21 -05:00
Christian König
b07c60c065 drm/amdgpu: move ring from IBs into job 
We can't submit to multiple rings at the same time anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:20 -05:00
Christian König
9e5d53094c drm/amdgpu: make pad_ib a ring function v3 
The padding depends on the firmware version and we need that for BO moves as
well, not only for VM updates.

v2: new approach of making pad_ib a ring function
v3: fix typo in macro name

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:20 -05:00
Christian König
4c0b242cf2 drm/amdgpu: cleanup user fence handling in the CS 
Don't keep that around twice.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:19 -05:00
Christian König
50838c8cc4 drm/amdgpu: add proper job alloc/free functions 
And use them in the CS instead of allocating IBs and jobs separately.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:18 -05:00
Christian König
4acabfe379 drm/amdgpu: fix num_ibs check 
Specifying no IBs on command submission is invalid, stop crashing
badly when somebody tries it.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:18 -05:00
Christian König
867d0517c7 drm/amdgpu: remove AMDGPU_NUM_SYNCS 
Just a leftover from semaphores.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:17 -05:00
Christian König
8a8f0b48a0 drm/amdgpu: remove adev and fence from amdgpu_sync_free 
Just leftovers from the semaphores.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:17 -05:00
Christian König
cc325d1913 drm/amdgpu: check userptrs mm earlier 
Instead of when we try to bind it check the usermm when
we try to use it in the IOCTLs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:16 -05:00
Alex Deucher
6e9821b26d drm/amdgpu/gfx: minor code cleanup 
Drop needless function wrapper.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:15 -05:00
Christian König
cd75dc6887 drm/amdgpu: separate pushing CS to scheduler 
Move that out of the main IOCTL function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:14 -05:00
Christian König
7270f8391d drm/amdgpu: add amdgpu_set_ib_value helper (v2) 
And use it in UVD/VCE command patching.

v2: squash in Christian's fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:14 -05:00
Christian König
b6ea2f37a2 drm/amdgpu: fix size estimation for clear IB 
We only need a few dw here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:13 -05:00
Alex Deucher
b87c032b4b drm/amdgpu/smu: skip SMC ucode loading on SR-IOV capable boards (v2) 
VBIOS does this for us in asic_init.

v2: update iceland as well

Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:13 -05:00
Alex Deucher
c12d287119 drm/amdgpu/gmc8: skip MC ucode loading on SR-IOV capable boards 
VBIOS does this for us in asic_init.

Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:12 -05:00
Alex Deucher
8cce244cf6 drm/amdgpu: always repost cards that support SR-IOV 
Generally a good idea between VM sessions.  We need a way to
detect VM pass-through in general and always run asic_init in
that case.

Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:11 -05:00
Alex Deucher
7e471e6fba drm/amdgpu: track whether the asic supports SR-IOV 
Required to make desicions about certain code pathes.

Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:11 -05:00
Alex Deucher
e74adf2039 drm/amdgpu: add check for atombios GPU virtualization table 
This table is found on boards that support SR-IOV.  This will
be used to determine if the board supports SR-IOV and allow
the driver to take specific action in certain cases.

Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:10 -05:00
Alex Deucher
383b6f608b drm/amdgpu: remove unused function 
amdgpu_boot_test_post_card() is not used anywhere.  Probably
a leftover from the original port from radeon.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:10 -05:00
Maruthi Srinivas Bayyavarapu
25030321ba drm/amd: add pm domain for ACP IP sub blocks 
ACP IP have internal DMA controller, DW I2S controller and DSPs
as separate power tiles. DMA and I2S devices are added to generic
pm domain, so that entire IP can be powered off/on at appropriate
times. Unused DSPs are made to be powered off though they are powered
on during ACP pm domain power on sequence.

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:09 -05:00
Maruthi Bayyavarapu
a8fe58cec3 drm/amd: add ACP driver support 
This adds the ACP (Audio CoProcessor) IP driver and wires
it up to the amdgpu driver.  The ACP block provides the DMA
engine for i2s based ALSA driver. This is required for audio
on APUs that utilize an i2s codec.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Murali Krishna Vemuri <murali-krishna.vemuri@amd.com>
Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:08 -05:00
Christian König
4ebd1673c6 drm/amdgpu: remove power of two limit for vramlimit 
That works with other values as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:08 -05:00
Christian König
31f6c1fedb drm/amdgpu: optimize amdgpu_vm_update_ptes a bit 
Don't calculate the end address multiple times.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:07 -05:00
Christian König
8843dbbbf3 drm/amdgpu: cleanup comments in VM code 
Neither the global nor the local mutex exists any more and
amdgpu doesn't support cayman.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-02-10 14:17:07 -05:00