The original patch was to add compatible string for Hi3519 soc
and do some cleanup.
Since the generic machine entry could meet most of the cases,
so I did a further cleanup to reuse it and just keep one machine
entry that needs map_io here.
Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Hook up all devices that are part of the CPG/MSSR Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up the Cortex-A57 CPU core and L2 cache/SCU to their respective PM
Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Basic support for the Gen 3 R-Car M3-W SoC.
Based on work for the r8a7795 and r8a7796 SoCs by
Takeshi Kihara, Dirk Behme and Geert Uytterhoeven.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Adds CAN FD controller node for r8a7795.
Note: CAN FD controller register base address specified in R-Car Gen3
Hardware User Manual v0.5E is incorrect. The correct address is:
CAN FD - 0xe66c0000
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Despite attempting to fix this in commit fb36e90736 ("powerpc/pci: Fix
SRIOV not building without EEH enabled"), the build is still broken when
PCI_IOV=y and EEH=n (eg. g5_defconfig with PCI_IOV=y):
arch/powerpc/kernel/pci_dn.c: In function ‘remove_dev_pci_data’:
arch/powerpc/kernel/pci_dn.c:230:18: error: unused variable ‘edev’
Incorporate Ben's idea of using __maybe_unused to avoid so many #ifdefs.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
For memory hotplug to work, the MMU code needs to provide the functions
create_section_mapping() and remove_section_mapping() to respectively
map and unmap portions of the linear mapping.
At the moment only hash64 provides these, so we provide weak stubs that
just error out. This fixes the build with configurations such as 64-bit
BookE with CONFIG_MEMORY_HOTPLUG enabled.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
The rk3399 gets support for its emmc controller as well as thermal,
i2c and core io-domain nodes and some reasonable default rates
for core clocks. The rk3368 also gets io-domains for its r88 board
as well as a small fix for the gic's memory regions.
* tag 'v4.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add ap_pwroff and ddrio_pwroff pins for rk3399
arm64: dts: rockchip: Provide emmcclk to PHY for rk3399
arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399
arm64: dts: rockchip: fixes the gic400 2nd region size for rk3368
arm64: dts: rockchip: add i2c nodes for rk3399
arm64: dts: rockchip: add thermal nodes for rk3399 SoCs
arm64: dts: rockchip: add rk3399 io-domain core nodes
arm64: dts: rockchip: add rk3368-r88 iodomains
arm64: dts: rockchip: add rk3368 io-domain core nodes
arm64: dts: rockchip: make rk3368 grf syscons simple-mfds
arm64: dts: rockchip: enable eMMC for rk3399 EVB
arm64: dts: rockchip: add sdhci/emmc for rk3399
arm64: dts: rockchip: make rk3399's grf a "simple-mfd"
arm64: dts: rockchip: assign default rates for core rk3399 clocks
Signed-off-by: Olof Johansson <olof@lixom.net>
Audio support and spi-flash on rk3288-veyron Chromedevices
as well as i2s and ethernet support on rk3228/rk3229 devices
and a dts file for the rk3229 eval board.
* tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add support rk3229 evb board
ARM: dts: rockchip: add GMAC nodes for RK322x SoCs
ARM: dts: rockchip: add i2s nodes for RK322x SoCs
ARM: dts: rockchip: rename rk3228.dtsi to rk322x.dtsi
clk: rockchip: add clock-ids for rk3228 MAC clocks
clk: rockchip: add clock-ids for rk3228 audio clocks
ARM: dts: rockchip: rename i2s model for Veyron devices
ARM: dts: rockchip: move rk3288 io-domain nodes to the grf
ARM: dts: rockchip: Enable analog audio on rk3288-veyron chromebooks
ARM: dts: rockchip: Add shared file for audio on rk3288-veyron boards
ARM: dts: rockchip: add SPI flash node for rk3288-veyron
Signed-off-by: Olof Johansson <olof@lixom.net>
This allows to switch the card signal voltage level to 1.8 V, which is
needed for any ultra high speed modes to work.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Second Round of Renesas ARM Based SoC Updates for v4.8
* Add DT support to the APMU driver and prioritise DT APMU support
* Obtain extal frequency from DT
* Add support for r8a7792
* tag 'renesas-soc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: Prioritize DT APMU support
ARM: shmobile: r8a7790: Prioritize DT APMU support
ARM: shmobile: smp: Add function to prioritize DT SMP
ARM: shmobile: apmu: Add APMU DT support via Enable method
ARM: shmobile: apmu: Move #ifdef CONFIG_SMP to cover more functions
ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H
ARM: shmobile: rcar-gen2: Obtain extal frequency from DT
ARM: shmobile: r8a7792: basic SoC support
soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper
soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver
soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains
soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init()
soc: renesas: rcar-sysc: add R8A7792 support
soc: renesas: rcar-sysc: Add support for R-Car M3-W power areas
soc: renesas: Add r8a7796 SYSC PM Domain Binding Definitions
soc: renesas: rcar-sysc: Document r8a7796 support
Signed-off-by: Olof Johansson <olof@lixom.net>
Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.8
* Prepare for handling SYSC interrupt configuration purely
from DT in the rcar-sysc driver for new SoCs, while preserving
backward compatibility with old DTBs for R-Car H1, H2, and M2-W
* Add R8A7792 support
* tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper
soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver
soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains
soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init()
soc: renesas: rcar-sysc: add R8A7792 support
Signed-off-by: Olof Johansson <olof@lixom.net>
Second Round of Renesas ARM Based SoC DT Updates for v4.8
* Use APMU on R-Car Gen2 and provide SMP for r8a7793 SoC
* Update console parameters to uniformly use chosen/stdout-path,
serial0, not provide kernel unnecessary command line parameters
* Add DU pins to silk board
* Add support for blanche/r8a7792
* Name pfc subnodes after device name
* tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (41 commits)
ARM: dts: r8a7792: add SMP support
ARM: dts: r8a7793: Add APMU node and second CPU core
ARM: dts: r8a7791: Add APMU node
ARM: dts: r8a7790: Add APMU nodes
devicetree: bindings: Renesas APMU and SMP Enable method
ARM: dts: kzm9g: Update console parameters
ARM: dts: kzm9d: Update console parameters
ARM: dts: marzen: Add serial port config to chosen/stdout-path
ARM: dts: genmai: Update console parameters
ARM: dts: armadillo800eva: Update console parameters
ARM: dts: r8a7792: add JPU support
ARM: dts: r8a7792: add JPU clocks
ARM: dts: silk: add DU pins
ARM: dts: blanche: add Ethernet support
ARM: dts: blanche: initial device tree
ARM: dts: blanche: document Blanche board
ARM: dts: r8a7792: add IRQC support
ARM: dts: r8a7792: add [H]SCIF support
ARM: dts: r8a7792: add SYS-DMAC support
ARM: dts: r8a7792: initial SoC device tree
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Renesas ARM Based SoC Defconfig Updates for v4.8
* Enable newly added support for r8a7792 SoC in multi_v7 and shmobile
defconfigs
* tag 'renesas-defconfig-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: multi_v7_defconfig: defconfig: Enable r8a7792 SoC
ARM: shmobile: defconfig: Enable r8a7792 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
Building with CONFIG_HOTPLUG_CPU disabled fails for mach-tango:
include/linux/stddef.h:7:14: error: excess elements in struct initializer [-Werror]
#define NULL ((void *)0)
arch/arm/mach-tango/platsmp.c:48:15: note: in expansion of macro 'tango_cpu_kill'
.cpu_kill = tango_cpu_kill,
the problem as that the .cpu_kill and .cpu_die struct members are
unavailable and we must not try to assign them in this configuration.
Hiding the two (as all other platforms do too) lets us get rid of
the #else clause as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
Northstar Plus SoCs (ARCH_BCM_NSP) have the exact same UART location and
properties like the register shift of 0, so make it usable.
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This device uses BCH-1 instead of BCH-8. This fixes ECC errors and makes
NAND usable with brcmnand.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Using separated file with common chip select parameters will allow us
adding other ECC setups without code duplication.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Conflicts:
drivers/net/ethernet/mellanox/mlx5/core/en.h
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
drivers/net/usb/r8152.c
All three conflicts were overlapping changes.
Signed-off-by: David S. Miller <davem@davemloft.net>
* commit '5c34a4e89c743339f78cafb2f2a826a010f0746a':
ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB
ARM: uniphier: drop code for old DT binding
These cause a harmless conflict with the clps711x multiplatform
support, and it's easy to resolve.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Any CLPS711X-based board can be replaced with devicetree equivalent.
Remove the board files.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds the Cirrus Logic EP7209,EP7211 DT templates and support for
EDB7211 Development board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds basic support to run Cirrus Logic ARMv4T CPUs
with device-tree support.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Last CLPS711X CPU register is PLLR has 0xa5a8 address, so we can reduce
the map to 48k and align the end of the static at VMALLOC_START.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
To allow regression build testing of multi v4t systems, add a
multi_v4t_defconfig, similar to the multi_v5(v7)_defconfig.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Very early versions of the 1004K had an hardware issue that made index
cache ops unsafe so they had to be avoided and hit ops be used instead.
This may significantly slow down cache maintenance operations. Only
very early FPGA versions of the 1004K were affected so let's get rid
of the workaround which was only implemented for the DMA cache
maintenance operations anyway.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The kernel.h macro DIV_ROUND_UP performs the computation
(((n) + (d) - 1) /(d)) but is perhaps more readable.
The Coccinelle script used to make this change is as follows:
@haskernel@
@@
#include <linux/kernel.h>
@depends on haskernel@
expression n,d;
@@
(
- (n + d - 1) / d
+ DIV_ROUND_UP(n,d)
|
- (n + (d - 1)) / d
+ DIV_ROUND_UP(n,d)
)
Signed-off-by: Amitoj Kaur Chawla <amitoj1606@gmail.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
This will match how PMU errors are reported at check_hw_exists()'s
msr_fail label, which is reached when VPMU initialzation fails.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Juergen Gross <jgross@suse.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
The pv_time_ops structure contains a function pointer for the
"steal_clock" functionality used only by KVM and Xen on ARM. Xen on x86
uses its own mechanism to account for the "stolen" time a thread wasn't
able to run due to hypervisor scheduling.
Add support in Xen arch independent time handling for this feature by
moving it out of the arm arch into drivers/xen and remove the x86 Xen
hack.
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
The EFI DT parameters for bare metal are located under /chosen node,
while for Xen Dom0 they are located under /hyperviosr/uefi node. These
parameters under /chosen and /hyperviosr/uefi are not expected to appear
at the same time.
Parse these EFI parameters and initialize EFI like the way for bare
metal except the runtime services because the runtime services for Xen
Dom0 are available through hypercalls and they are always enabled. So it
sets the EFI_RUNTIME_SERVICES flag if it finds /hyperviosr/uefi node and
bails out in arm_enable_runtime_services() when EFI_RUNTIME_SERVICES
flag is set already.
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Cc: Stefano Stabellini <sstabellini@kernel.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
