At the CPU/ISA level, the J2 is compatible with SH-2, and thus the
changes to add J2 support build on existing SH-2 support. However, J2
does not duplicate the memory-mapped SH-2 features like the cache
interface. Instead, the cache interfaces is described in the device
tree, and new code is added to be able to access the flat device tree
at early boot before it is unflattened.
Support is also added for receiving interrupts on trap numbers in the
range 16 to 31, since the J-Core aic1 interrupt controller generates
these traps. This range was unused but nominally for hardware
exceptions on SH-2, and a few values in this range were used for
exceptions on SH-2A, but SH-2A has its own version of the relevant
code.
No individual cpu subtypes are added for J2 since the intent moving
forward is to represent SoCs with device tree rather than as
hard-coded subtypes in the kernel. The CPU_SUBTYPE_J2 Kconfig item
exists only to fit into the existing cpu selection mechanism until it
is overhauled.
Signed-off-by: Rich Felker <dalias@libc.org>
Pull SuperH updates from Paul Mundt:
- New CPUs: SH7734 (SH-4A), SH7264 and SH7269 (SH-2A)
- New boards: RSK2+SH7264, RSK2+SH7269
- Unbreaking kgdb for SMP
- Consolidation of _32/_64 page fault handling.
- watchdog and legacy DMA chainsawing, part 1
- Conversion to evt2irq() hwirq lookup, to support relocation of
vectored IRQs for irqdomains.
* tag 'sh-for-linus' of git://github.com/pmundt/linux-sh: (98 commits)
sh: intc: Kill off special reservation interface.
sh: Enable PIO API for hp6xx and se770x.
sh: Kill off machvec IRQ hinting.
sh: dma: More legacy cpu dma chainsawing.
sh: Kill off MAX_DMA_ADDRESS leftovers.
sh: Tidy up some of the cpu legacy dma header mess.
sh: Move sh4a dma header from cpu-sh4 to cpu-sh4a.
sh64: Fix up vmalloc fault range check.
Revert "sh: Ensure fixmap and store queue space can co-exist."
serial: sh-sci: Fix for port types without BRI interrupts.
sh: legacy PCI evt2irq migration.
sh: cpu dma evt2irq migration.
sh: sh7763rdp evt2irq migration.
sh: sdk7780 evt2irq migration.
sh: migor evt2irq migration.
sh: landisk evt2irq migration.
sh: kfr2r09 evt2irq migration.
sh: ecovec24 evt2irq migration.
sh: ap325rxa evt2irq migration.
sh: urquell evt2irq migration.
...
This is an sh2a device (max 266MHz) with FPU, video display
controller (VDC), 8 serial ports, 4 I2C channels, 3 CAN ports,
SD and on-chip USB.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This is an sh2a device with FPU, video display controller (VDC),
8 serial ports, 3 I2C channels, 2 CAN ports, SD and on-chip USB.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add probe support for the sh7372 SH4AL-DSP core.
The most common use case for this is when the system
boots from the ARM core in the sh7372 and uses the
SH core for application offload as a slave CPU.
May also be used to boot the sh7372 from the SH core.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
CPUs can be in either the legacy 29-bit or 32-bit physical addressing
modes. This follows the x86 approach of tracking the phys bits in cpuinfo
and exposing it to userspace through procfs.
This change was requested to permit kexec-tools to detect the physical
addressing mode in order to determine the appropriate address mangling.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This provides a cache of the secondary CPUs idle loop for the cases where
hotplug simply enters a low power state instead of resetting or powering
off the core.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This does a detect_cpu_and_cache_system() -> cpu_probe() rename, tidies
up the unused return value, and stuffs it under __cpuinit in preparation
for CPU hotplug.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This hooks up the SET/GET_UNALIGN_CTL knobs cribbing the bulk of it from
the PPC and ia64 implementations. The thread flags happen to be the
logical inverse of what the global fault mode is set to, so this works
out pretty cleanly. By default the global fault mode is used, with tasks
now being able to override their own settings via prctl().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This updates the sh64 processor info with the sh32 changes in order to
tie in to the generic task_xstate management code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds in a mem_init_done to work out when a standard ioremap() is
possible, falling back to the fixmap based ioremap otherwise.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds a family member to struct sh_cpuinfo, which allows us to fall
back more on the probe routines to work out what sort of subtype we are
running on. This will be used by the CPU cache initialization code in
order to first do family-level initialization, followed by subtype-level
optimizations.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch reworks the mode pin code to keep the pin
definitions in one place. The mode pins values are now
the value of the bit instead of bit number.
With this patch in place the sh7785 header file contains
mode pin comments. The sh7785 clock code and the sh7785lcr
board code are updated to reflect the new shared mode pins.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add mode pin support for the SuperH architecture V2.
With this patch applied the board code can add their
own function to export the cpu mode pin configuration.
In most cases this will be a constant bitmap, but
boards that allow reading this from a register can
instead read out the pin state from hardware.
The code warns if a pin is tested but no board specific
mode pin function has been provided.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements initial support for the SH-Mobile R2R CPU.
Based on Rev 0.11 of the initial SH7724 hardware manual.
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds support for the SH-2A FPU based SH7201 processor subtype.
Signed-off-by: Peter Griffin <pgriffin@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
