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8965 Commits

Author SHA1 Message Date
Paul Burton
f12401d721 MIPS: smp-cps: Pull boot config retrieval out of mips_cps_boot_vpes 
The mips_cps_boot_vpes function previously included code to retrieve
pointers to the core & VPE boot configuration structs. These structures
were used both by mips_cps_boot_vpes and by its mips_cps_core_entry
callsite. In preparation for skipping the call to mips_cps_boot_vpes on
some invocations of mips_cps_core_entry, pull the calculation of those
pointers out into a separate function such that it can continue to be
shared.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: Niklas Cassel <niklas.cassel@axis.com>
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12337/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:50 +02:00
Paul Burton
3dbc997161 MIPS: smp-cps: Pull cache init into a function 
In preparation for further modifications to mips_cps_core_entry, pull
the L1 cache initialisation out into a separate function. This both
makes the code in mips_cps_core_entry read more clearly, particularly
when modifying it, and shortens it which will become important as code
is added that needs to continue to fit within the reset vector.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12336/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:49 +02:00
Paul Burton
ba1c0a490a MIPS: smp-cps: Ensure our VP ident calculation is correct 
When bringing up a CPU, ensure that its local ID as provided by the GIC
matches up with our calculation of it. This is vital, since if the
condition doesn't hold then we won't have configured interrupts
correctly for the VP.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: Niklas Cassel <niklas.cassel@axis.com>
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12335/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:49 +02:00
Paul Burton
a60ae81e5e MIPS: CM: Fix mips_cm_max_vp_width for UP kernels 
Fix mips_cm_max_vp_width for UP kernels where it previously referenced
smp_num_siblings, which is not declared for UP kernels. This led to
build errors such as the following:

  drivers/built-in.o: In function `$L446':
  irq-mips-gic.c:(.text+0x1994): undefined reference to `smp_num_siblings'
  drivers/built-in.o:irq-mips-gic.c:(.text+0x199c): more undefined references to `smp_num_siblings' follow

On UP kernels simply return 1, leaving the reference to smp_num_siblings
in place only for SMP kernels.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12332/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:48 +02:00
Paul Burton
db8e00af7b MIPS: CM: Add CM GCR_BEV_BASE accessors 
Generate accessor functions for the GCR_BEV_BASE register introduced by
CM3, for use by a later patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12331/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:48 +02:00
Markos Chandras
88036557ba MIPS: CPC: Add start, stop and running CM3 CPC registers 
Add the new CM3 registers for controlling bringing up and powering down
VPs on MIPSR6 cores.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12330/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:48 +02:00
Markos Chandras
0f2a148448 MIPS: pm-cps: Avoid offset overflow on MIPSr6 
This is similar to commit 934c79231c ("MIPS: asm: r4kcache: Add MIPS
R6 cache unroll functions"). The CACHE instruction has been redefined
for MIPSr6 and it reduced its offset field to 8 bits. This leads to
micro-assembler field overflow warnings when booting SMP MIPSr6 cores
like the following one:

Call Trace:
[<ffffffff8010af88>] show_stack+0x68/0x88
[<ffffffff8056ddf0>] dump_stack+0x68/0x88
[<ffffffff801305bc>] warn_slowpath_common+0x8c/0xc8
[<ffffffff80130630>] warn_slowpath_fmt+0x38/0x48
[<ffffffff80125814>] build_insn+0x514/0x5c0
[<ffffffff806ee134>] cps_gen_cache_routine.isra.3+0xe0/0x1b8
[<ffffffff806ee570>] cps_pm_init+0x364/0x9ec
[<ffffffff80100538>] do_one_initcall+0x90/0x1a8
[<ffffffff806e8c14>] kernel_init_freeable+0x160/0x21c
[<ffffffff8056b6a0>] kernel_init+0x10/0xf8
[<ffffffff801059f8>] ret_from_kernel_thread+0x14/0x1c

We fix this by incrementing the base register on every loop.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12329/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:48 +02:00
Markos Chandras
04d83f9485 MIPS: traps: Make sure secondary cores have a sane ebase register 
We shouldn't trust that the secondary cores will have a sane ebase register
(either from the bootloader or during the hardware design phase) so use the
ebase address as calculated by the boot CPU.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Petri Gynther <pgynther@google.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12328/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:48 +02:00
Paul Burton
f270d881fa MIPS: Detect MIPSr6 Virtual Processor support 
MIPSr6 introduces support for "Virtual Processors", which are
conceptually similar to VPEs from the now-deprecated MT ASE. Detect
whether the system supports VPs using the VP bit in Config5, adding
cpu_has_vp for use by later patches.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Maciej W. Rozycki <macro@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Steven J. Hill <sjhill@realitydiluted.com>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12327/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:47 +02:00
Antony Pavlov
98c1c5078d MIPS: ath79: add initial support for DPT-Module 
The following features are supported:

  * UART;
  * SPI-flash;
  * USB host;
  * GPIO key and LED.

Links:

  * https://dptechnics.com/shop/index.php?route=product/product&path=59&product_id=50
  * https://dptechnics.com/shop/index.php?route=product/product&path=59&product_id=63

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Daan Pape <daan@dptechnics.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12886/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:47 +02:00
Antony Pavlov
930c54ff39 MIPS: ath79: add initial support for Onion Omega 
The following features are supported:

  * UART;
  * SPI-flash;
  * USB host;
  * GPIO key and LED.

Please see https://onion.io/omega for details.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Alban Bedel <albeu@free.fr>
Cc: L. D. Pinney <ldpinney@gmail.com>
Cc: Boken Lin <bl@onion.io>
Cc: Jacky Huang <huangfangcheng@163.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12884/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:47 +02:00
Antony Pavlov
3b9ec1b325 MIPS: ath79: add initial support for Dragino MS14 (Dragino 2) 
The following features are supported:

  * UART;
  * SPI-flash;
  * USB host;
  * GPIO keys and LEDs.

Links:

    * http://www.dragino.com/products/mother-board/item/71-ms14-p.html
    * https://wiki.openwrt.org/toh/dragino/ms14

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12882/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:46 +02:00
Antony Pavlov
2c3694d2e6 MIPS: ath79: add initial support for TP-LINK MR3020 
The following features are supported:

  * UART;
  * SPI-flash;
  * USB host;
  * GPIO keys and LEDs.

Links:

  * http://www.tp-link.com/en/products/details/?model=TL-MR3020
  * http://wiki.openwrt.org/toh/tp-link/tl-mr3020
  * https://wikidevi.com/wiki/TP-LINK_TL-MR3020

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12880/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:46 +02:00
Antony Pavlov
5ae5c452e3 MIPS: ath79: update devicetree clock support for AR9331 
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Alban Bedel <albeu@free.fr>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12879/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:46 +02:00
Antony Pavlov
1e6a3492e7 MIPS: dts: qca: introduce AR9331 devicetree 
This patch introduces devicetree for Atheros AR9331 SoC (AKA Hornet).
The AR9331 chip is a Wi-Fi System-On-Chip (WiSOC),
typically used in very cheap Access Points and Routers.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12878/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:45 +02:00
Antony Pavlov
f4fe969d7f MIPS: ath79: Disable platform code for OF boards. 
For OF boards we have to skip platform initialization code
so we can prove that OF code do all necessary initialization.

[ralf@linux-mips.org: Fix merge conflict.]

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12877/
Patchwork: https://patchwork.linux-mips.org/patch/12920/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:45 +02:00
Antony Pavlov
3bdf1071ba MIPS: ath79: update devicetree clock support for AR9132 
Current ath79 clock.c code does not read reference clock and
pll setup from devicetree. E.g. you can set any clock rate value
in board DTS but it will have no effect on the real clk calculation.

This patch fixes some AR9132 devicetree clock support defects:

  * clk initialization function ath79_clocks_init_dt_ng()
    is introduced; it actually gets pll block base register
    address and reference clock from devicetree;
  * pll register parsing code is moved to the separate
    ar724x_clk_init() function; this function
    can be called from platform code or from devicetree code.

Also mips_hpt_frequency value is set from dt, so the appropriate
clock parameter is added to the cpu@0 devicetree node.

The same approach can be used for adding AR9331 devicetree support.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Alban Bedel <albeu@free.fr>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12876/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:45 +02:00
Antony Pavlov
af5ad0de22 MIPS: ath79: Introduce <dt-bindings/clock/ath79-clk.h> 
The include/dt-bindings/clock/ath79-clk.h header file
is introduced so we can use symbolic identifiers for SoC clocks.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Alban Bedel <albeu@free.fr>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12875/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:45 +02:00
Antony Pavlov
83fe838466 MIPS: dts: qca: ar9132: use short references for dt nodes 
Here are some Sascha Hauer's arguments for using aliases in the dts
files:

 - using aliases reduces the number of indentations in dts files;

 - dts files become independent of the layout of the dtsi files
   (it becomes possible to introduce another bus {} hierarchy between
   a toplevel bus and the devices when you have to);

 - less chances for typos. if &i2c2 does not exist you get an error.
   If instead you duplicate the whole path in the dts file a typo
   in the path will just create another node.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Alban Bedel <albeu@free.fr>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12873/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:45 +02:00
Antony Pavlov
2cdfec1bbb MIPS: dts: qca: ar9132_tl_wr1043nd_v1.dts: drop unused alias node 
The TP-LINK TL-WR1043ND board has only one serial port,
so replacing the default of 0 with 0 does nothing useful.

Moreover, the correct name for aliases node is "aliases" not "alias".

An overview of the "aliases" node usage can be found
on the device tree usage page at devicetree.org [1].

Also please see chapter 3.3 ("Aliases node") of the ePAPR 1.1 [2].

[1] http://devicetree.org/Device_Tree_Usage#aliases_Node
[2] https://www.power.org/documentation/epapr-version-1-1/

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Acked-by: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12872/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:45 +02:00
Hauke Mehrtens
e791dfb5fb MIPS: Lantiq: Make it possible to build in no device tree 
Now it is possible to build in no device tree at all and depend on the
boot loader providing one or someone concatenating a device tree to the
end of the image.

This was copied from arch/mips/bmips/Kconfig

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12899/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:44 +02:00
Hauke Mehrtens
84f47cf49e MIPS: Lantiq: Add support for device tree file from boot loader 
This fetches the device tree file like it is specified in the MIPS UHI
interface if one was found. This is also used when the device tree file
was appended to the kernel image with cat.
This code is copied from arch/mips/bmips/setup.c.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12898/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:44 +02:00
Aaro Koskinen
842c1e2c4a MIPS: Octeon: Add DTS for EdgeRouter Lite 
Add DTS for EdgeRouter Lite that is usable as is without any "pruning"
with APPENDED_DTB.

Compared to builtin generic DTB, we can avoid errors and delays from
probing non-existent I2C devices.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:44 +02:00
Aaro Koskinen
fa0a497b9e MIPS: Octeon: Add DTS for D-Link DSR-1000N 
Add DTS for D-Link DSR-1000N that is usable as is without any "pruning"
with APPENDED_DTB. Split out the common parts from octeon_3xxx.dts
into octeon_3xxx.dtsi.

Compared to builtin generic DTB, we can specificy fixed links properly
and avoid probing non-existent I2C devices.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12840/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:44 +02:00
Aaro Koskinen
99a7a234c8 MIPS: panic immediately when panic_on_oops 
MIPS wants to sleep 5 seconds before panicking when panic_on_oops is set,
with no apparent reason. Remove this feature, since some users may want
their systems to fail as quickly as possible.

Users who want to delay reboot after panic can use PANIC_TIMEOUT.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: James E.J. Bottomley <jejb@parisc-linux.org>
Cc: Helge Deller <deller@gmx.de>
Cc: linux-mips@linux-mips.org
Cc: linux-parisc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12845/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:44 +02:00
Rafał Miłecki
2ab71a02c5 MIPS: BCM47xx: Move SPROM driver to drivers/firmware/ 
Broadcom ARM home routers store SPROM content in NVRAM just like MIPS
ones. To share SPROM code we need to move it out of arch/mips/ to some
common place. We already have bcm47xx_nvram in firmware path and SPROM
should fit there as well.
This driver is responsible for parsing SoC configuration data into a
struct shared between ssb and bcma buses.
This was tested with BCM4706 & BCM5357C0 (BCM47XX) and BCM4708A0
(ARCH_BCM_5301X).

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12210/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:43 +02:00
Philipp Zabel
b11d022767 MIPS: ralink: Make reset_control_ops const 
The reset_ops structure is never modified. Make it const.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Cc: kernel@pengutronix.de
Patchwork: https://patchwork.linux-mips.org/patch/12618/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:43 +02:00
Philipp Zabel
24bc827beb MIPS: lantiq: Make reset_control_ops const 
The reset_ops structure is never modified. Make it const.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Cc: kernel@pengutronix.de
Patchwork: https://patchwork.linux-mips.org/patch/12619/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:43 +02:00
Aaro Koskinen
2296cecf71 MIPS: Octeon: device_tree_init: fill mac addresses when using appended dtb 
Fill MAC addresses from bootinfo when using appended DTB.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12590/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:43 +02:00
Aaro Koskinen
377de399a1 MIPS: Octeon: device_tree_init: don't fill mac if already set 
Don't fill MAC address if it's already set. This allows DTB to
override the bootinfo.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12589/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:42 +02:00
Aaro Koskinen
43349b9e4b MIPS: Octeon: device_tree_init: use separate pass to fill mac addresses 
Use separate pass to fill MAC addresses. This is needed because we want
to do this also for the appended DTB.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12588/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:42 +02:00
Aaro Koskinen
1a1590ab1a MIPS: Octeon: Use model string from DTB for unknown board type 
Use model string from DTB for board type if the board is unknown.
This is more informative, e.g. with EdgeRouter Pro the /proc/cpuinfo
will display "ubnt,e200 (CN6120p1.1-1000-NSP)" instead of misleading
"Unsupported Board".

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12582/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:42 +02:00
Aaro Koskinen
8f2068bc9e MIPS: Octeon: Initialize system type string after device tree init. 
Initialize system type string after device tree init.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12583/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:42 +02:00
Aaro Koskinen
6ecffafe24 MIPS: Octeon: board_type_to_string: return NULL for unsupported board 
Return NULL for unsupported board.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12581/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:41 +02:00
David Daney
490f7548cf MIPS: OCTEON: Simplify code in octeon_irq_ciu_gpio_set_type() 
Use the trigger type passed in to the function instead of reading it
back out of the irq_data.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12501/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:41 +02:00
David Daney
c6d2b22eb5 MIPS: OCTEON: Add SMP support for OCTEON cn78xx et al. 
OCTEON chips with the CIU3 interrupt controller use a different IPI
mechanism that previous models.

Add plat_smp_ops for the cn78xx and probing code to choose between the
two types of ops.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12499/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:41 +02:00
David Daney
ce210d35bb MIPS: OCTEON: Add support for OCTEON III interrupt controller. 
Add irq_chip support for both IPI and "normal" interrupts of the CIU3
controller.  Document the device tree binding for the CIU3.

Some functions are non-static as they will be used by follow-on
support for MSI-X.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12500/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:41 +02:00
David Daney
9bc2223995 MIPS: OCTEON: Don't attempt to use nonexistent registers on OCTEON III models. 
Attempts to read the nonexistent registers results in bus errors.
Either use registers that exist, or don't do the access as appropriate.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12502/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:40 +02:00
David Daney
182a6d1cd3 MIPS: OCTEON: Add model checking support for cn73xx, cnf75xx and cn78xx 
Follow on patchs need to be able to distinguish the new models.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12498/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:40 +02:00
David Daney
2df11221bd MIPS: OCTEON: Add register definitions for cn73xx, cnf75xx and cn78xx. 
These new members of the OCTEON III family have some new registers,
update some of the definitions for use in follow on patches.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12497/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:40 +02:00
David Daney
1d2753a66a MIPS: Select CONFIG_HANDLE_DOMAIN_IRQ and make it work. 
Per the subject, always select HANDLE_DOMAIN_IRQ, and implement
set_irq_regs() so that it actually works.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12496/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:40 +02:00
David Daney
2253e0b9d9 MIPS: OCTEON: Remove some code limiting NR_IRQS to 255 
Follow-on patches for OCTEON III will increase the number of irqs to
potentially more than 256.

Increase the width of the octeon_irq_ciu_to_irq to int to be able to
handle this case.  Remove the hacky code that verified that u8 would
not be overflowed.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12495/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:39 +02:00
David Daney
7d52ab163c MIPS: OCTEON: Extend number of supported CPUs past 32 
To support more than 48 CPUs, the bootinfo structure grows a new
coremask structure.  Add the definition of the structure and add it to
struct cvmx_bootinfo.  In prom_init(), copy the new coremask data into
the sysinfo structure, and use it in smp_setup().

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12319/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:39 +02:00
David Daney
58546e3b73 MIPS: OCTEON: Remove dead code from cvmx-sysinfo. 
Get rid of the long unused code.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12318/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:39 +02:00
David Daney
b8c8f66507 MIPS: Add CPU identifiers and probing for Cavium CN73xx and CNF75xx processors. 
Add new processor identifiers for Cavium CN73xx and CNF75xx
processors, and probe for them in cpu-probe.c

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12311/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:38 +02:00
Ralf Baechle
34ae8e3688 MIPS: highmem: Turn flush_cache_kmaps into a no-op. 
It was calling flush_cache_all() which is a no-op since a long time anyway
and which was overkill in the old days when it was actually doing something
because only the D-cache needs to be flushed, never the I-cache, never
the S-cache.  Since however highmem on MIPS is still only supported on
processors that don't suffer from cache aliases, we could turn
flush_cache_kmaps() into a no-op - but for paranoia's sake we rather make
it BUG_ON(cpu_has_dc_aliases()).

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:38 +02:00
Ralf Baechle
429365b2a1 MIPS: Loongson64: Remove call to flush_cache_all(). 
flush_cache_all() is a nop and loongson 3 is fully coherent.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:38 +02:00
Ralf Baechle
a48ac3a131 MIPS: VR41xx: Use __flush_cache_all instead of flush_cache_all. 
It's probably a good idea to flush caches before reset and by the time
this code was written flush_cache_all did actually still do something.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:38 +02:00
Ralf Baechle
7c8196fd43 MIPS: MSP71xx: Use __flush_cache_all instead of flush_cache_all. 
Flushing caches is probably sensible on reset but flush_cache_all has been
a no-op for a very long time.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:38 +02:00
Ralf Baechle
9329c154e4 MIPS: Octeon: Use __flush_cache_all instead of flush_cache_all. 
flush_cache_all will go away.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:01:37 +02:00