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23 Commits

Author SHA1 Message Date
John Crispin
97b921087f MIPS: Change my email address 
The old address is no longer valid. Use the my new one instead.

Signed-off-by: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13201/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:02:18 +02:00
John Crispin
08b3c894e5 MIPS: lantiq: Disable xbar fpi burst mode 
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11458/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2015-11-11 08:38:24 +01:00
Hauke Mehrtens
6e80785267 MIPS: Lantiq: Fix check for return value of request_mem_region() 
request_mem_region() returns a pointer and not an integer with an error
value. A check for "< 0" on a pointer will cause problems, replace it
with not null checks instead. This was found with sparse.

Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11395/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2015-11-11 08:37:34 +01:00
Hauke Mehrtens
5072d8142a MIPS: Lantiq: Add misc clocks 
Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11393/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2015-11-11 08:37:30 +01:00
Hauke Mehrtens
e71f6d356d MIPS: Lantiq: Add 1e103100.deu clock 
Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11392/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2015-11-11 08:37:25 +01:00
Hauke Mehrtens
a3a6853498 MIPS: Lantiq: Add clock for mei driver 
Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11391/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2015-11-11 08:37:23 +01:00
Hauke Mehrtens
d0b991e376 MIPS: Lantiq: Add pmu bits for ar10 and grx390 
Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11388/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2015-11-11 08:37:16 +01:00
Hauke Mehrtens
e182c98a59 MIPS: Lantiq: Add PMU bits for USB and SDIO devices 
This adds the PUM bits for USB and SDIO devices

Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11387/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2015-11-11 08:37:13 +01:00
Hauke Mehrtens
95135bfa7e MIPS: Lantiq: Deactivate most of the devices by default 
When the SoC starts up most of the devices should be deactivated by the
PMU, they should be activated when they get used by their drivers. Some
devices should not get deactivate at startup like the serial, register
them in a special way.

Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11386/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2015-11-11 08:37:11 +01:00
Hauke Mehrtens
758d2443ed MIPS: Lantiq: Add support for setting PMU register on AR10 and GRX390 
This adds support for setting the PMU register on the AR10 and GRX390.

Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11382/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2015-11-11 08:37:01 +01:00
Hauke Mehrtens
cab7b8363c MIPS: Lantiq: Add locking for PMU register and check status afterwards 
The PMU register are accessed in a non atomic way and they could be
accessed by different threads simultaneously, which could cause
problems this patch adds locking around the PMU registers. In
addition we now also wait till the PMU is actually deactivated.

[ralf@linux-mips.org: Fix spelling mistake in commit message as noticed
by Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>.]

Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11381/
Patchwork: https://patchwork.linux-mips.org/patch/11396/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2015-11-11 08:37:00 +01:00
Masanari Iida
1a84db567a treewide: fix errors in printk 
This patch fix spelling typo in printk.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
 2014-09-01 11:18:25 +02:00
Ralf Baechle
f7777dcc75 MIPS: Panic messages should not end in \n. 
Panic() is going to add a \n itself and it's annoying if a panic message rolls
of the screen on a device with no scrollback.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2013-10-29 21:24:19 +01:00
John Crispin
d0c550dc36 MIPS: lantiq: add GPHY clock gate bits 
Explicitly enable the clock gate of the internal GPHYs found on xrx200.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4816/
 2013-02-17 00:15:17 +01:00
John Crispin
740c606e8e MIPS: lantiq: adds static clock for PP32 
The Lantiq DSL SoCs have an internal networking processor. Add code to read
the static clock rate.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4815/
 2013-02-17 00:15:17 +01:00
John Crispin
3d18c17e4f MIPS: lantiq: trivial typo fix 
"nodes" is written with a single "s"

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4814/
 2013-02-17 00:15:16 +01:00
John Crispin
f2bbe41c50 MIPS: lantiq: adds xrx200 ethernet clock definition 
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4521
 2012-11-11 18:47:31 +01:00
Ralf Baechle
382fc33b4a Merge branch 'master' of git://dev.phrozen.org/mips-next into mips-for-linux-next 2012-10-05 15:56:28 +02:00
John Crispin
f40e1f9d85 MIPS: lantiq: enable pci clk conditional for xrx200 SoC 
The xrx200 SoC family has the same PCI clock register layout as the AR9.
Enable the same quirk as for AR9

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4235/
 2012-08-23 00:08:18 +02:00
John Crispin
98dbc5764d MIPS: lantiq: explicitly enable clkout generation 
Previously we relied on the bootloader to have enabled this bit. However some
bootloaders seem to not enable this for us.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4120/
 2012-08-22 23:46:37 +02:00
John Crispin
e29b72f5e1 MIPS: Lantiq: Fix interface clock and PCI control register offset 
The XRX200 based SoC have a different register offset for the interface
clock and PCI control registers. This patch detects the SoC and sets the
register offset at runtime. This make PCI work on the VR9 SoC.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4113/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-08-01 17:57:04 +02:00
John Crispin
009d6914f1 MIPS: lantiq: remove orphaned code 
Now that all drivers are converted to OF we are able to remove some remaining
pieces of orphaned code.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3841/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-05-26 19:52:57 +01:00
John Crispin
287e3f3f4e MIPS: lantiq: implement support for clkdev api 
This patch unifies all clock generation and gating code into one file.
All drivers will now be able to request their clocks via their device.
This patch also adds support for the clockout feature, which allows
clock generation on external pins.

Support for COMMON_CLK will be provided in the next series.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3804/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-05-21 14:31:51 +01:00