Commit Graph

48346 Commits

Author SHA1 Message Date
Peter Griffin
64933513e4 reset: sti: Remove STiH415/6 reset support
Support for STiH415/6 SoCs is being removed from the
kernel because the platforms are obsolete. This patch removes
the reset drivers for these SoC's.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-10-20 11:52:08 +02:00
Russell King
e642873dcc ARM: sa1100: remove SA-1101 header file
Remove the completely unused SA-1101 header file.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2016-10-19 18:04:31 +01:00
Scott Branden
b350e9dd1f ARM: dts: cygnus: fix naming of pinctrl node
Remove 0x from pinctrl node to match device tree naming convention.

Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:54 -07:00
Rafał Miłecki
547f23183d ARM: BCM53573: Specify PMU and its ILP clock in the DT
ILP clock (sometimes called a "slow clock") is a part of PMU (Power
Management Unit). There has been recently added a driver for it, so add
a proper entry in the DT as well.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:53 -07:00
Dan Haab
4335e6fd58 ARM: BCM5301X: Add DT for Luxul XWR-3100
Luxul XWR-3100 is a wireless router based on BCM47094 SoC with two
4366c0 FullMAC PCIe cards on the PCB. It uses NAND with BCH-4 ECC
algorithm.

Signed-off-by: Dan Haab <dhaab@luxul.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:51 -07:00
Dan Haab
fe91846397 ARM: BCM5301X: Add DT for Luxul XAP-1510
Luxul XAP-1510 is an AP device based on BCM4708 SoC with 2 x BCM4360
chipsets on PCB connected using PCIe.

Signed-off-by: Dan Haab <dhaab@luxul.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:50 -07:00
Rafał Miłecki
92b7b6ad1a ARM: BCM5301X: Specify USB 3.0 PHY in DT
Driver for Northstar USB 3.0 PHY has been recently added under the name
phy-bcm-ns-usb3. Add binding for it into the DT files.
The only slightly tricky part is BCM47094 which uses different PHY
version and requires different compatible value.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:48 -07:00
Rafał Miłecki
fa87b008da ARM: BCM5301X: Enable UART on Netgear R8000
It was tested by LEDE users, all we need is to adjust clock frequency.
While we're at it create a separated DTS include file to share code with
other BCM4709 devices easier.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:47 -07:00
Rafał Miłecki
54b902a4cd ARM: BCM5301X: Add separated DTS include file for BCM47094
Use it to store BCM47094 specific properties/values and avoid repeating
them in device DTS files.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:45 -07:00
Kamal Dasu
329f98c197 ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes
Adding QSPI Device Tree node compatible with the new spi-bcm-qspi driver for
the Broadcom Northstar Plus SoC DTSI and bcm958625k reference board.

Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:43 -07:00
Rafał Miłecki
e90d2d51c4 ARM: BCM5301X: Add basic dts for BCM53573 based Tenda AC9
BCM53573 seems to be low priced alternative for Northstar chipsts. It
uses single core Cortex-A7 and doesn't have SDU or local (TWD) timer. It
was also stripped out of independent SPI controller and 2 GMACs.

DTS for Tenda AC9 isn't completed yet. It misses e.g. switch entry (we
still need some b53 fixes) and probably some clocks. It adds support for
basic features however and can be improved later.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:42 -07:00
Rafał Miłecki
05b3c64d56 ARM: BCM5301X: Add DT for Netgear R8500
Netgear R8500 is another BCM47094 device, it just has three BCM4366
wireless chipsets. It's a very standard DT with mostly GPIO devices.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:40 -07:00
Florian Fainelli
8dace30404 ARM: multi_v7_defconfig: Enable BCM47xx/BCM5301x drivers
Add a bunch of required drivers and subsystems:

- BCMA is the on-chip discoverable bus which registers a bunch of
  peripherals
- Enable the BCM47xx watchdog driver to get working system reboot
- Enable the BCM47xx NVRAM/SPROM drivers to be able to fetch MAC
  addresses and other variables needed for system operation
- Make BGMAC (built-in Ethernet adapter) a module

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:36:54 -07:00
Nicolas Pitre
207b1150c0 ARM: 8619/1: udelay: document the various constants
Explain where the value for UDELAY_MULT and UDELAY_SHIFT come from.
Also fix/clarify some comments pertaining to their usage in the
assembly code.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2016-10-19 10:52:36 +01:00
Russell King
6127d124ee ARM: wire up new pkey syscalls
Wire up the new pkey syscalls for ARM.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2016-10-19 10:18:47 +01:00
Russell King
04946fb60f ARM: fix oops when using older ARMv4T CPUs
Alexander Shiyan reports that CLPS711x fails at boot time in the data
exception handler due to a NULL pointer dereference.  This is caused by
the late-v4t abort handler overwriting R9 (which becomes zero).  Fix
this by making the abort handler save and restore R9.

Unable to handle kernel NULL pointer dereference at virtual address 00000008
pgd = c3b58000
[00000008] *pgd=800000000, *pte=00000000, *ppte=feff4140
Internal error: Oops: 63c11817 [#1] PREEMPT ARM
CPU: 0 PID: 448 Comm: ash Not tainted 4.8.1+ #1
Hardware name: Cirrus Logic CLPS711X (Device Tree Support)
task: c39e03a0 ti: c3b4e000 task.ti: c3b4e000
PC is at __dabt_svc+0x4c/0x60
LR is at do_page_fault+0x144/0x2ac
pc : [<c000d3ac>]    lr : [<c000fcec>]    psr: 60000093
sp : c3b4fe6c  ip : 00000001  fp : b6f1bf88
r10: c387a5a0  r9 : 00000000  r8 : e4e0e001
r7 : bee3ef83  r6 : 00100000  r5 : 80000013  r4 : c022fcf8
r3 : 00000000  r2 : 00000008  r1 : bf000000  r0 : 00000000
Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment user
Control: 0000217f  Table: c3b58055  DAC: 00000055
Process ash (pid: 448, stack limit = 0xc3b4e190)
Stack: (0xc3b4fe6c to 0xc3b50000)
fe60:                            bee3ef83 c05168d1 ffffffff 00000000 c3adfe80
fe80: c3a03300 00000000 c3b4fed0 c3a03400 bee3ef83 c387a5a0 b6f1bf88 00000001
fea0: c3b4febc 00000076 c022fcf8 80000013 ffffffff 0000003f bf000000 bee3ef83
fec0: 00000004 00000000 c3adfe80 c00e432c 00000812 00000005 00000001 00000006
fee0: b6f1b000 00000000 00010000 0003c944 0004d000 0004d439 00010000 b6f1b000
ff00: 00000005 00000000 00015ecc c3b4fed0 0000000a 00000000 00000000 c00a1dc0
ff20: befff000 c3a03300 c3b4e000 c0507cd8 c0508024 fffffff8 c3a03300 00000000
ff40: c0516a58 c00a35bc c39e03a0 000001c0 bea84ce8 0004e008 c3b3a000 c00a3ac0
ff60: c3b40374 c3b3a000 bea84d11 00000000 c0500188 bea84d11 bea84ce8 00000001
ff80: 0000000b c000a304 c3b4e000 00000000 bea84ce4 c00a3cd0 00000000 bea84d11
ffa0: bea84ce8 c000a160 bea84d11 bea84ce8 bea84d11 bea84ce8 0004e008 0004d450
ffc0: bea84d11 bea84ce8 00000001 0000000b b6f45ee4 00000000 b6f5ff70 bea84ce4
ffe0: b6f2f130 bea84cb0 b6f2f194 b6ef29f4 a0000010 bea84d11 02c7cffa 02c7cffd
[<c000d3ac>] (__dabt_svc) from [<c022fcf8>] (__copy_to_user_std+0xf8/0x330)
[<c022fcf8>] (__copy_to_user_std) from [<c00e432c>]
+(load_elf_binary+0x920/0x107c)
[<c00e432c>] (load_elf_binary) from [<c00a35bc>]
+(search_binary_handler+0x80/0x16c)
[<c00a35bc>] (search_binary_handler) from [<c00a3ac0>]
+(do_execveat_common+0x418/0x600)
[<c00a3ac0>] (do_execveat_common) from [<c00a3cd0>] (do_execve+0x28/0x30)
[<c00a3cd0>] (do_execve) from [<c000a160>] (ret_fast_syscall+0x0/0x30)
Code: e1a0200d eb00136b e321f093 e59d104c (e5891008)
---[ end trace 4b4f8086ebef98c5 ]---

Fixes: e6978e4bf1 ("ARM: save and reset the address limit when entering an exception")
Reported-by: Alexander Shiyan <shc_work@mail.ru>
Tested-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2016-10-19 10:18:43 +01:00
Steffen Trumtrar
c96f5919e6 ARM: dts: socfpga: socrates: enable qspi
Enable the qspi controller on the socrates and add the flash chip.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-18 22:18:14 -05:00
Steffen Trumtrar
c6deff00b9 ARM: dts: socfpga: add qspi node
Add the qspi node to the socfpga dtsi file.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-18 22:18:13 -05:00
Thor Thayer
acf3b20c23 ARM: dts: socfpga: Add LED framework to A10-SR GPIO
Add the LED framework to the Arria10 System Resource chip GPIO hooks.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-18 22:18:12 -05:00
Thor Thayer
07e75f4393 ARM: dts: socfpga: Enable GPIO parent for Arria10 SR chip
Enable the Altera Arria10 GPIO parent for MFD operation.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-18 22:18:12 -05:00
Thor Thayer
5984be047d ARM: dts: socfpga: Add Devkit A10-SR fields for Arria10
Add the Altera Arria10 System Resource node. This is a Multi-Function
device with GPIO expander support.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-18 22:18:11 -05:00
Thor Thayer
f2d6f8f817 ARM: dts: socfpga: Add SPI Master1 for Arria10 SR chip
Add the Altera Arria10 SPI Master Node in preparation for
the A10SR MFD node.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-18 22:17:51 -05:00
Steffen Trumtrar
b112f8e829 ARM: socfpga: defconfig: enable qspi
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-18 15:58:05 -05:00
Dinh Nguyen
ecba2390e3 ARM: dts: socfpga: enable arm,shared-override in the pl310
Enable the bit(22) shared-override bit for the SoCFPGA family. While at it,
enable the prefetch-data and prefetch-instr settings for the Arria10.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-18 15:57:13 -05:00
Nobuhiro Iwamatsu
73c7d4203c ARM: dts: socfpga: Add Macnica sodia board
Add support for board based on the Altera Cyclone V SoC.
This board has the following functions:
    - 1 GiB of DRAM
    - 1 Gigabit ethernet
    - 1 SD card slot
    - 1 USB gadget port
    - QSPI NOR Flash
    - I2C EEPROMs and I2C RTC
    - DVI output
    - Audio port

This commit supports without QSPI, DVI and Audio.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-18 15:57:13 -05:00
Marek Vasut
587aed72c6 ARM: dts: socfpga: Add new MCVEVK manufacturer compat
The board is now manufactured by Aries Embedded GmbH, update compat string.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-18 15:57:13 -05:00
Russell King
219622b7b3 ARM: wire up new pkey syscalls
Wire up the new pkey syscalls for ARM.  This illustrates the ease that
the generated/tabular approach gives us: adding new system calls
becomes much easier, and all the dependencies are automatically handled
for the update.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2016-10-18 21:34:07 +01:00
Russell King
96a8fae0fe ARM: convert to generated system call tables
Convert ARM to use a similar mechanism to x86 to generate the unistd.h
system call numbers and the various kernel system call tables.  This
means that rather than having to edit three places (asm/unistd.h for
the total number of system calls, uapi/asm/unistd.h for the system call
numbers, and arch/arm/kernel/calls.S for the call table) we have only
one place to edit, making the process much more simple.

The scripts have knowledge of the table padding requirements, so there's
no need to worry about __NR_syscalls not fitting within the immediate
constant field of ALU instructions anymore.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2016-10-18 21:34:06 +01:00
Russell King
4e2648db9c ARM: remove indirection of asm/mach-types.h
Arrange for mach-types.h to be directly generated in the relevant
path, so we don't need a one-liner file in arch/arm/include/asm/.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2016-10-18 20:18:08 +01:00
Robert Jarzmik
9a97434215 ARM: pxa: enhance smc91x platform data
Instead of having the smc91x driver relying on machine_is_*() calls,
provide this data through platform data, ie. idp, mainstone and
stargate.

This way, the driver doesn't need anymore machine_is_*() calls, which
wouldn't work anymore with a device-tree build.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-10-18 14:14:20 -04:00
Randy Li
339b2fb36a ARM: dts: exynos: Add TOPEET itop elite based board
The TOPEET itop Exynos4412 has three versions of base boards. The
Elite version is the cheap one without too much peripheral devices
on it.

Currently supported are serial console, wired networking (USB), USB OTG
in peripheral mode, USB host, SD storage, GPIO buttons, PWM beeper, ADC
and LEDs. The WM8960 analog audio codec is also enabled.

The FIMC is not used for camera currently, I enabled it just for a
colorspace converter.

Signed-off-by: Randy Li <ayaka@soulik.info>
Acked-by: Rob Herring <robh@kernel.org>
[krzk: fixup pin function macro, adjust commit msg]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2016-10-18 20:42:52 +03:00
Randy Li
accc477c9c ARM: dts: exynos: Add TOPEET itop core board SCP package version
The TOPEET itop is a Samsung Exynos4412 core board, which has
two package versions. This patch adds the support for SCP version.

Currently supported are USB3503A HSIC, USB OTG, eMMC, RTC and
PMIC. The future features are in the based board. Also MFC and
watchdog have been enabled.

Signed-off-by: Randy Li <ayaka@soulik.info>
[krzk: fixup pin function macro, adjust commit msg]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2016-10-18 20:42:48 +03:00
Mugunthan V N
1f06554442 ARM: dts: dra72-evm-revc: fix correct phy delay
The current delay settings of the phy are not the optimal value,
fix it with correct values.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-10-18 10:42:16 -04:00
Mugunthan V N
b76db38cd8 ARM: dts: dra72-evm-revc: add phy impedance settings
The default impedance settings of the phy is not the optimal
value, due to this the second ethernet is not working. Fix it
with correct values which makes the second ethernet port to work.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-10-18 10:42:16 -04:00
Peter Griffin
ecaf33bc03 ARM: multi_v7_defconfig: Enable STi and simple-card drivers.
This patch enables the STi ALSA drivers found on STi platforms
as well as the simple-card driver which is a dependency to have
working sound.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Cc: arnaud.pouliquen@st.com
Cc: broonie@kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-10-18 20:12:06 +05:30
Peter Griffin
5cb7b365d3 ARM: multi_v7_defconfig: Enable STi FDMA driver
This DMA controller is found on all STi chipsets.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-10-18 20:12:06 +05:30
Peter Griffin
4ba975a896 ARM: multi_v7_defconfig: Enable st_remoteproc driver.
The st231 remote coprocessors are found on all STi chipsets.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-10-18 20:12:06 +05:30
Peter Griffin
6fb347c057 ARM: multi_v7_defconfig: Enable remoteproc core
Now that remoteproc core is selectable it needs to be enabled
in the multi_v7 build.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-10-18 20:12:06 +05:30
Robert Jarzmik
3738ca1b2a ARM: pxa: pxa_cplds: honor probe deferral
The method to acquire the input interrupt was working in a platform data
based board, but was failing in a device-tree one when the gpio
controller was probed after pxa_cplds.

Use platform_get_irq() to benefit from the probe deferral
mechanism. Moreover, as seen in dm9000.c development, platform_get_irq()
doesn't honor the irq type IO resource (ie. edge rising for example),
and it must be passed again at irq request in a not device-tree build,
hence the irq_get_trigger_type() call.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2016-10-18 09:12:37 +02:00
Robert Jarzmik
d3570e3c50 ARM: sa11x0/pxa: get rid of get_clock_tick_rate
The last user of this function is gone, so remove it. The clock API
should now be used to get clock rates.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
2016-10-18 09:12:37 +02:00
Robert Jarzmik
f4e14edf25 ARM: sa11x0/pxa: acquire timer rate from the clock rate
As both pxa and sa1100 provide a clock to the timer, the rate can be
inferred from the clock rather than hard encoded in a functional call.

This patch changes the pxa timer to have a mandatory clock which is used
as the timer rate.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
2016-10-18 09:12:36 +02:00
Scott Branden
2723605169 ARM: multi_v7_defconfig: Enable Intel e1000e driver
Enable support for the Intel e1000e driver

Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-10-17 15:03:20 -07:00
Linus Walleij
1b283eea62 ARM: dts: fix the SD card on the Snowball
This fixes a very annoying regression on the Snowball SD card
that has been around for a while. It turns out that the device
tree does not configure the direction pins properly, nor sets
up the pins for the voltage converter properly at boot. Unless
all things are correctly set up, the feedback clock will not
work, and makes the driver spew messages in the console (but
it works, very slowly):

root@Ux500:/ mount /dev/mmcblk0p2 /mnt/
[    9.953460] mmci-pl18x 80126000.sdi0_per1: error during DMA transfer!
[    9.960296] mmcblk0: error -110 sending status command, retrying
[    9.966461] mmcblk0: error -110 sending status command, retrying
[    9.972534] mmcblk0: error -110 sending status command, aborting

Fix this by rectifying the device tree to correspond to that of
the Ux500 HREF boards plus the DAT31DIR setting that is unique for
the Snowball, and things start working smoothly. Add in the SDR12
and SDR25 modes which this host can do without any problems.

I don't know if this has ever been correct, sadly. It works after
this patch.

Cc: stable@vger.kernel.org
Reported-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-10-17 13:45:48 -07:00
Olof Johansson
5c85b8722c Merge tag 'mvebu-fixes-4.8-3' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 4.8 (part 3)

- Select corediv clk for all mvebu v7 SoC
- Fix clocksource for CP110 master SPI0 for Armada 7K/8K

* tag 'mvebu-fixes-4.8-3' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: fix clocksource for CP110 master SPI0
  ARM: mvebu: Select corediv clk for all mvebu v7 SoC

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-10-17 13:44:03 -07:00
Gerd Hoffmann
a6d962aeb2 ARM: dts: bcm283x: drop alt3 from &gpio
As the alt3 group has no pins left drop it from &gpio.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
2016-10-17 09:55:48 -07:00
Gerd Hoffmann
f8bef3619b ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
2016-10-17 09:55:47 -07:00
Gerd Hoffmann
4eb65cbfa7 ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2016-10-17 09:55:46 -07:00
Gerd Hoffmann
e6e1997120 ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
2016-10-17 09:55:46 -07:00
Gerd Hoffmann
14e0ea3405 ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
2016-10-17 09:55:45 -07:00
Eric Anholt
21ff843931 ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made.  With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to specific groups we want enabled.

Also add pinctrl groups for emmc and sdhost.

Based on patches by Eric Anholt, with fixups by Gerd Hoffmann.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
2016-10-17 09:55:27 -07:00